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1.1 nbrk 1: /* $OpenBSD: asm.h,v 1.8 2006/05/08 14:03:34 miod Exp $ */
2:
3: /*
4: * Mach Operating System
5: * Copyright (c) 1993-1992 Carnegie Mellon University
6: * Copyright (c) 1991 OMRON Corporation
7: * All Rights Reserved.
8: *
9: * Permission to use, copy, modify and distribute this software and its
10: * documentation is hereby granted, provided that both the copyright
11: * notice and this permission notice appear in all copies of the
12: * software, derivative works or modified versions, and any portions
13: * thereof, and that both notices appear in supporting documentation.
14: *
15: * CARNEGIE MELLON AND OMRON ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16: * CONDITION. CARNEGIE MELLON AND OMRON DISCLAIM ANY LIABILITY OF ANY KIND
17: * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18: *
19: * Carnegie Mellon requests users of this software to return to
20: *
21: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
22: * School of Computer Science
23: * Carnegie Mellon University
24: * Pittsburgh PA 15213-3890
25: *
26: * any improvements or extensions that they make and grant Carnegie the
27: * rights to redistribute these changes.
28: */
29:
30: #ifndef __M88K_ASM_H__
31: #define __M88K_ASM_H__
32:
33: #ifdef __STDC__
34: #define _C_LABEL(name) _ ## name
35: #else
36: #define _C_LABEL(name) _/**/name
37: #endif
38:
39: #define _ASM_LABEL(name) name
40:
41: #define _ENTRY(name) \
42: .text; .align 8; .globl name; name:
43:
44: #define ENTRY(name) _ENTRY(_C_LABEL(name))
45: #define ASENTRY(name) _ENTRY(_ASM_LABEL(name))
46:
47: #define GLOBAL(name) \
48: .globl _C_LABEL(name); _C_LABEL(name):
49:
50: #define ASGLOBAL(name) \
51: .globl _ASM_LABEL(name); _ASM_LABEL(name):
52:
53: #define LOCAL(name) \
54: _C_LABEL(name):
55:
56: #define ASLOCAL(name) \
57: _ASM_LABEL(name):
58:
59: #define BSS(name, size) \
60: .comm _C_LABEL(name), size
61:
62: #define ASBSS(name, size) \
63: .comm _ASM_LABEL(name), size
64:
65: #ifdef __ELF__
66: #define WEAK_ALIAS(alias,sym) \
67: .weak alias; \
68: alias = sym
69: #else
70: #ifdef __STDC__
71: #define WEAK_ALIAS(alias,sym) \
72: .weak _##alias; \
73: _##alias = _##sym
74: #else
75: #define WEAK_ALIAS(alias,sym) \
76: .weak _/**/alias; \
77: _/**/alias = _/**/sym
78: #endif
79: #endif
80:
81: #ifdef _KERNEL
82:
83: #ifdef _LOCORE
84: /*
85: * Control register symbolic names
86: */
87:
88: #define PID cr0
89: #define PSR cr1
90: #define EPSR cr2
91: #define SSBR cr3
92: #define SXIP cr4
93: #define SNIP cr5
94: #define SFIP cr6
95: #define VBR cr7
96: #define DMT0 cr8
97: #define DMD0 cr9
98: #define DMA0 cr10
99: #define DMT1 cr11
100: #define DMD1 cr12
101: #define DMA1 cr13
102: #define DMT2 cr14
103: #define DMD2 cr15
104: #define DMA2 cr16
105: #define SR0 cr17
106: #define SR1 cr18
107: #define SR2 cr19
108: #define SR3 cr20
109:
110: /* MVME197 only */
111: #define SRX cr16
112: #define EXIP cr4
113: #define ENIP cr5
114: #define ICMD cr25
115: #define ICTL cr26
116: #define ISAR cr27
117: #define ISAP cr28
118: #define IUAP cr29
119: #define IIR cr30
120: #define IBP cr31
121: #define IPPU cr32
122: #define IPPL cr33
123: #define ISR cr34
124: #define ILAR cr35
125: #define IPAR cr36
126: #define DCMD cr40
127: #define DCTL cr41
128: #define DSAR cr42
129: #define DSAP cr43
130: #define DUAP cr44
131: #define DIR cr45
132: #define DBP cr46
133: #define DPPU cr47
134: #define DPPL cr48
135: #define DSR cr49
136: #define DLAR cr50
137: #define DPAR cr51
138: /* end MVME197 only */
139:
140: #define FPECR fcr0
141: #define FPHS1 fcr1
142: #define FPLS1 fcr2
143: #define FPHS2 fcr3
144: #define FPLS2 fcr4
145: #define FPPT fcr5
146: #define FPRH fcr6
147: #define FPRL fcr7
148: #define FPIT fcr8
149: #define FPSR fcr62
150: #define FPCR fcr63
151:
152: /*
153: * At various times, there is the need to clear the pipeline (i.e.
154: * synchronize). A "tb1 0, r0, foo" will do that (because a trap
155: * instruction always synchronizes, and this particular instruction
156: * will never actually take the trap).
157: */
158: #define FLUSH_PIPELINE tb1 0, r0, 0
159: #define NOP or r0, r0, r0
160: #define RTE NOP ; rte
161:
162: /*
163: * Info about the PSR
164: */
165: #define PSR_SHADOW_FREEZE_BIT 0
166: #define PSR_INTERRUPT_DISABLE_BIT 1
167: #define PSR_FPU_DISABLE_BIT 3
168: #define PSR_BIG_ENDIAN_MODE 30
169: #define PSR_SUPERVISOR_MODE_BIT 31
170: /*
171: * mc88110 PSR bit definitions (MVME197)
172: */
173: #define PSR_GRAPHICS_DISABLE_BIT 4
174: #define PSR_SERIAL_MODE_BIT 29
175: #define PSR_CARRY_BIT 28
176: #define PSR_SERIALIZE_BIT 25
177:
178: #define VECTOR(x) \
179: word _C_LABEL(x)
180:
181: #define CPU SR0
182:
183: #endif /* _LOCORE */
184:
185: #define FLUSH_PIPELINE_STRING "tb1 0, r0, 0"
186:
187: /*
188: * Status bits for an SXIP/SNIP/SFIP address.
189: */
190: #define RTE_VALID_BIT 1
191: #define RTE_ERROR_BIT 0
192:
193: /*
194: * Info about DMT0/DMT1/DMT2
195: */
196: #define DMT_VALID_BIT 0
197: #define DMT_WRITE_BIT 1
198: #define DMT_LOCK_BIT 12
199: #define DMT_DOUBLE_BIT 13
200: #define DMT_DAS_BIT 14
201: #define DMT_DREG_OFFSET 7
202: #define DMT_DREG_WIDTH 5
203:
204: #endif /* _KERNEL */
205:
206: #endif /* __M88K_ASM_H__ */