Annotation of sys/arch/m68k/include/psl.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: psl.h,v 1.6 2007/05/16 19:37:06 thib Exp $ */
2: /* $NetBSD: psl.h,v 1.5 1994/10/26 07:50:50 cgd Exp $ */
3:
4: /*
5: * Copyright (c) 1982, 1986, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: * 3. Neither the name of the University nor the names of its contributors
17: * may be used to endorse or promote products derived from this software
18: * without specific prior written permission.
19: *
20: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
21: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
24: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30: * SUCH DAMAGE.
31: *
32: * @(#)psl.h 8.1 (Berkeley) 6/10/93
33: */
34:
35: #ifndef _M68K_PSL_H_
36: #define _M68K_PSL_H_
37:
38: /*
39: * MC680x0 program status word
40: */
41:
42: #define PSL_C 0x0001 /* carry bit */
43: #define PSL_V 0x0002 /* overflow bit */
44: #define PSL_Z 0x0004 /* zero bit */
45: #define PSL_N 0x0008 /* negative bit */
46: #define PSL_X 0x0010 /* extend bit */
47: #define PSL_ALLCC 0x001F /* all cc bits - unlikely */
48: #define PSL_IPL0 0x0000 /* interrupt priority level 0 */
49: #define PSL_IPL1 0x0100 /* interrupt priority level 1 */
50: #define PSL_IPL2 0x0200 /* interrupt priority level 2 */
51: #define PSL_IPL3 0x0300 /* interrupt priority level 3 */
52: #define PSL_IPL4 0x0400 /* interrupt priority level 4 */
53: #define PSL_IPL5 0x0500 /* interrupt priority level 5 */
54: #define PSL_IPL6 0x0600 /* interrupt priority level 6 */
55: #define PSL_IPL7 0x0700 /* interrupt priority level 7 */
56: #define PSL_M 0x1000 /* master (kernel) sp vs intr sp */
57: #define PSL_S 0x2000 /* supervisor enable bit */
58: /* PSL_T0 0x4000 ??? T0 on 68020, 8000 is T1 */
59: #define PSL_T 0x8000 /* trace enable bit */
60:
61: #define PSL_LOWIPL (PSL_S)
62: #define PSL_HIGHIPL (PSL_S | PSL_IPL7)
63: #define PSL_IPL (PSL_IPL7)
64: #define PSL_USER (0)
65:
66: #define PSL_MBZ 0xFFFF58E0 /* must be zero bits */
67:
68: #define PSL_USERSET (0)
69: #define PSL_USERCLR (PSL_S | PSL_IPL7 | PSL_MBZ)
70:
71: #define USERMODE(ps) (((ps) & PSL_S) == 0)
72:
73: #ifdef _KERNEL
74:
75: /* SPL asserts */
76: #ifdef DIAGNOSTIC
77: /*
78: * Although this function is implemented in MI code, it must be in this MD
79: * header because we don't want this header to include MI includes.
80: */
81: void splassert_fail(int, int, const char *);
82: extern int splassert_ctl;
83: void splassert_check(int, const char *);
84: #define splassert(__wantipl) \
85: do { \
86: if (splassert_ctl > 0) { \
87: splassert_check(__wantipl, __func__); \
88: } \
89: } while (0)
90: #else
91: #define splassert(wantipl) do { /* nothing */ } while (0)
92: #endif
93:
94: /*
95: * Convert PSL values to CPU IPLs and vice-versa.
96: */
97: #define PSLTOIPL(x) (((x) >> 8) & 0xf)
98: #define IPLTOPSL(x) ((((x) & 0xf) << 8) | PSL_S)
99:
100: /*
101: * spl functions; all but spl0 are done in-line
102: */
103:
104: #define _spl(s) \
105: ({ \
106: register int _spl_r; \
107: \
108: __asm __volatile ("clrl %0; movew sr,%0; movew %1,sr" : \
109: "=&d" (_spl_r) : "di" (s)); \
110: _spl_r; \
111: })
112:
113: #define _splraise(s) \
114: ({ \
115: register int _spl_r; \
116: \
117: __asm __volatile (" \
118: clrl d0 ; \
119: movw sr,d0 ; \
120: movl d0,%0 ; \
121: andw #0x700,d0 ; \
122: movw %1,d1 ; \
123: andw #0x700,d1 ; \
124: cmpw d0,d1 ; \
125: jle 1f ; \
126: movw %1,sr ; \
127: 1:" : \
128: "=&d" (_spl_r) : \
129: "di" (s) : \
130: "d0", "d1"); \
131: _spl_r; \
132: })
133:
134: #endif /* _KERNEL */
135:
136: #endif /* _M68K_PSL_H_ */
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