Annotation of sys/arch/m68k/include/cpu.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: cpu.h,v 1.17 2007/05/22 10:31:08 martin Exp $ */
! 2: /* $NetBSD: cpu.h,v 1.3 1997/02/02 06:56:57 thorpej Exp $ */
! 3:
! 4: /*
! 5: * Copyright (c) 1988 University of Utah.
! 6: * Copyright (c) 1982, 1990, 1993
! 7: * The Regents of the University of California. All rights reserved.
! 8: *
! 9: * This code is derived from software contributed to Berkeley by
! 10: * the Systems Programming Group of the University of Utah Computer
! 11: * Science Department.
! 12: *
! 13: * Redistribution and use in source and binary forms, with or without
! 14: * modification, are permitted provided that the following conditions
! 15: * are met:
! 16: * 1. Redistributions of source code must retain the above copyright
! 17: * notice, this list of conditions and the following disclaimer.
! 18: * 2. Redistributions in binary form must reproduce the above copyright
! 19: * notice, this list of conditions and the following disclaimer in the
! 20: * documentation and/or other materials provided with the distribution.
! 21: * 3. Neither the name of the University nor the names of its contributors
! 22: * may be used to endorse or promote products derived from this software
! 23: * without specific prior written permission.
! 24: *
! 25: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
! 26: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! 27: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 28: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
! 29: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 30: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 31: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 32: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 33: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 34: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 35: * SUCH DAMAGE.
! 36: *
! 37: * from: Utah $Hdr: cpu.h 1.16 91/03/25$
! 38: *
! 39: * @(#)cpu.h 8.4 (Berkeley) 1/5/94
! 40: */
! 41:
! 42: #ifndef _M68K_CPU_H_
! 43: #define _M68K_CPU_H_
! 44:
! 45: /*
! 46: * Exported definitions common to Motorola m68k-based ports.
! 47: *
! 48: * Note that are some port-specific definitions here, such as
! 49: * HP and Sun MMU types. These facilitate adding very small
! 50: * amounts of port-specific code to what would otherwise be
! 51: * identical. The is especially true in the case of the HP
! 52: * and other m68k pmaps.
! 53: *
! 54: * Individual ports are expected to define the following CPP symbols
! 55: * in <machine/cpu.h> to enable conditional code:
! 56: *
! 57: * M68K_MMU_MOTOROLA Machine may have a Motorola MMU (incl.
! 58: * 68851, 68030, 68040, 68060)
! 59: *
! 60: * M68K_MMU_HP Machine may have an HP MMU.
! 61: *
! 62: * Note also that while m68k-generic code conditionalizes on the
! 63: * M68K_MMU_HP CPP symbol, none of the HP MMU definitions are in this
! 64: * file (since none are used in otherwise sharable code).
! 65: */
! 66:
! 67: #ifdef _KERNEL
! 68: #ifndef _LOCORE
! 69: #include <sys/sched.h>
! 70:
! 71: struct cpu_info {
! 72: struct proc *ci_curproc;
! 73:
! 74: struct schedstate_percpu ci_schedstate;
! 75: };
! 76:
! 77: extern struct cpu_info cpu_info_store;
! 78:
! 79: #define curcpu() (&cpu_info_store)
! 80:
! 81: #define CPU_IS_PRIMARY(ci) 1
! 82: #define CPU_INFO_ITERATOR int
! 83: #define CPU_INFO_FOREACH(cii, ci) \
! 84: for (cii = 0, ci = curcpu(); ci != NULL; ci = NULL)
! 85:
! 86: #define cpu_number() 0
! 87:
! 88: /*
! 89: * All m68k ports must provide these globals.
! 90: */
! 91: extern int cputype; /* CPU on this host */
! 92: extern int ectype; /* external cache on this host */
! 93: extern int fputype; /* FPU on this host */
! 94: extern int mmutype; /* MMU on this host */
! 95:
! 96: #endif /* !_LOCORE */
! 97: #endif /* _KERNEL */
! 98:
! 99: /* values for cputype */
! 100: #define CPU_68020 0 /* 68020 */
! 101: #define CPU_68030 1 /* 68030 */
! 102: #define CPU_68040 2 /* 68040 */
! 103: #define CPU_68060 3 /* 68060 */
! 104:
! 105: /* values for ectype */
! 106: #define EC_PHYS -1 /* external physical address cache */
! 107: #define EC_NONE 0 /* no external cache */
! 108: #define EC_VIRT 1 /* external virtual address cache */
! 109:
! 110: /* values for fputype */
! 111: #define FPU_NONE 0 /* no FPU */
! 112: #define FPU_68881 1 /* 68881 FPU */
! 113: #define FPU_68882 2 /* 68882 FPU */
! 114: #define FPU_68040 3 /* 68040 on-chip FPU */
! 115: #define FPU_68060 4 /* 68060 on-chip FPU */
! 116: #define FPU_UNKNOWN 5 /* placeholder; unknown FPU */
! 117:
! 118: /* values for mmutype (assigned for quick testing) */
! 119: #define MMU_68060 -3 /* 68060 on-chip MMU */
! 120: #define MMU_68040 -2 /* 68040 on-chip MMU */
! 121: #define MMU_68030 -1 /* 68030 on-chip subset of 68851 */
! 122: #define MMU_HP 0 /* HP proprietary */
! 123: #define MMU_68851 1 /* Motorola 68851 */
! 124: #define MMU_SUN 2 /* Sun MMU */
! 125:
! 126: /*
! 127: * 68851 and 68030 MMU
! 128: */
! 129: #define PMMU_LVLMASK 0x0007
! 130: #define PMMU_INV 0x0400
! 131: #define PMMU_WP 0x0800
! 132: #define PMMU_ALV 0x1000
! 133: #define PMMU_SO 0x2000
! 134: #define PMMU_LV 0x4000
! 135: #define PMMU_BE 0x8000
! 136: #define PMMU_FAULT (PMMU_WP|PMMU_INV)
! 137:
! 138: /*
! 139: * 68040 MMU
! 140: */
! 141: #define MMU40_RES 0x001
! 142: #define MMU40_TTR 0x002
! 143: #define MMU40_WP 0x004
! 144: #define MMU40_MOD 0x010
! 145: #define MMU40_CMMASK 0x060
! 146: #define MMU40_SUP 0x080
! 147: #define MMU40_U0 0x100
! 148: #define MMU40_U1 0x200
! 149: #define MMU40_GLB 0x400
! 150: #define MMU40_BE 0x800
! 151:
! 152: /* 680X0 function codes */
! 153: #define FC_USERD 1 /* user data space */
! 154: #define FC_USERP 2 /* user program space */
! 155: #define FC_PURGE 3 /* HPMMU: clear TLB entries */
! 156: #define FC_SUPERD 5 /* supervisor data space */
! 157: #define FC_SUPERP 6 /* supervisor program space */
! 158: #define FC_CPU 7 /* CPU space */
! 159:
! 160: /* fields in the 68020 cache control register */
! 161: #define IC_ENABLE 0x0001 /* enable instruction cache */
! 162: #define IC_FREEZE 0x0002 /* freeze instruction cache */
! 163: #define IC_CE 0x0004 /* clear instruction cache entry */
! 164: #define IC_CLR 0x0008 /* clear entire instruction cache */
! 165:
! 166: /* additional fields in the 68030 cache control register */
! 167: #define IC_BE 0x0010 /* instruction burst enable */
! 168: #define DC_ENABLE 0x0100 /* data cache enable */
! 169: #define DC_FREEZE 0x0200 /* data cache freeze */
! 170: #define DC_CE 0x0400 /* clear data cache entry */
! 171: #define DC_CLR 0x0800 /* clear entire data cache */
! 172: #define DC_BE 0x1000 /* data burst enable */
! 173: #define DC_WA 0x2000 /* write allocate */
! 174:
! 175: /* fields in the 68040 cache control register */
! 176: #define IC40_ENABLE 0x00008000 /* instruction cache enable bit */
! 177: #define DC40_ENABLE 0x80000000 /* data cache enable bit */
! 178:
! 179: /* additional fields in the 68060 cache control register */
! 180: #define DC60_NAD 0x40000000 /* no allocate mode, data cache */
! 181: #define DC60_ESB 0x20000000 /* enable store buffer */
! 182: #define DC60_DPI 0x10000000 /* disable CPUSH invalidation */
! 183: #define DC60_FOC 0x08000000 /* four kB data cache mode (else 8) */
! 184:
! 185: #define IC60_EBC 0x00800000 /* enable branch cache */
! 186: #define IC60_CABC 0x00400000 /* clear all branch cache entries */
! 187: #define IC60_CUBC 0x00200000 /* clear user branch cache entries */
! 188:
! 189: #define IC60_NAI 0x00004000 /* no allocate mode, instr. cache */
! 190: #define IC60_FIC 0x00002000 /* four kB instr. cache (else 8) */
! 191:
! 192: #define CACHE_ON (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE)
! 193: #define CACHE_OFF (DC_CLR|IC_CLR)
! 194: #define CACHE_CLR (CACHE_ON)
! 195: #define IC_CLEAR (DC_WA|DC_BE|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE)
! 196: #define DC_CLEAR (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_ENABLE)
! 197:
! 198: #define CACHE40_ON (IC40_ENABLE|DC40_ENABLE)
! 199: #define CACHE40_OFF (0x00000000)
! 200:
! 201: #define CACHE60_ON (CACHE40_ON|IC60_CABC|IC60_EBC|DC60_ESB)
! 202: #define CACHE60_OFF (CACHE40_OFF|IC60_CABC)
! 203:
! 204: /* bits in the 68060 Processor Control Register */
! 205: #define PCR_IDSHIFT 16
! 206: #define PCR_IDMASK 0xffff
! 207: #define PCR_68060 0x430
! 208: #define PCR_68060LC 0x431
! 209: #define PCR_REVSHIFT 8
! 210: #define PCR_REVMASK 0xff
! 211: #define PCR_DEBUG 0x80
! 212: #define PCR_FPUDIS 0x02
! 213: #define PCR_SUPERSCALAR 0x01
! 214:
! 215: #ifdef _KERNEL
! 216: struct frame;
! 217: struct fpframe;
! 218: struct pcb;
! 219: struct proc;
! 220: struct trapframe;
! 221:
! 222: void copypage(void *fromaddr, void *toaddr);
! 223: void zeropage(void *addr);
! 224:
! 225: /* locore.s */
! 226: void TBIS(vaddr_t);
! 227: void TBIAS(void);
! 228: void TBIAU(void);
! 229: void ICIA(void);
! 230: void DCIA(void);
! 231: void DCIS(void);
! 232: void DCIU(void);
! 233: #if defined(M68040) || defined(M68060)
! 234: void ICPA(void);
! 235: void DCFA(void);
! 236: void ICPL(paddr_t);
! 237: void ICPP(paddr_t);
! 238: void DCPL(paddr_t);
! 239: void DCPP(paddr_t);
! 240: void DCFL(paddr_t);
! 241: void DCFP(paddr_t);
! 242: #endif
! 243:
! 244: u_long getdfc(void);
! 245: u_long getsfc(void);
! 246: void loadustp(int);
! 247: void m68881_restore(struct fpframe *);
! 248: void m68881_save(struct fpframe *);
! 249: void proc_trampoline(void);
! 250: void savectx(struct pcb *);
! 251: int suline(caddr_t, caddr_t);
! 252: void switch_exit(struct proc *);
! 253:
! 254: /* m68k_machdep.c */
! 255: void userret(struct proc *);
! 256:
! 257: /* regdump.c */
! 258: void regdump(struct trapframe *, int);
! 259:
! 260: /* sys_machdep.c */
! 261: int cachectl(struct proc *, int, vaddr_t, int);
! 262: #define CC_PURGE 0x00000001
! 263: #define CC_FLUSH 0x00000002
! 264: #define CC_IPURGE 0x00000004
! 265: #define CC_EXTPURGE 0x80000000
! 266:
! 267: /*
! 268: * This is used during profiling to integrate system time.
! 269: */
! 270: #define PROC_PC(p) (((struct trapframe *)((p)->p_md.md_regs))->tf_pc)
! 271:
! 272: #endif /* _KERNEL */
! 273:
! 274: #endif /* _M68K_CPU_H_ */
CVSweb