Annotation of sys/arch/m68k/include/asm_single.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: asm_single.h,v 1.3 2001/01/15 19:50:37 deraadt Exp $ */
2: /* $NetBSD: asm_single.h,v 1.1 1996/09/16 06:03:58 leo Exp $ */
3:
4: /*
5: * Copyright (c) 1996 Leo Weppelman.
6: * All rights reserved.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: * 3. All advertising materials mentioning features or use of this software
17: * must display the following acknowledgement:
18: * This product includes software developed by Leo Weppelman.
19: * 4. The name of the author may not be used to endorse or promote products
20: * derived from this software without specific prior written permission
21: *
22: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32: */
33:
34: #ifndef _M68K_ASM_SINGLE_H
35: #define _M68K_ASM_SINGLE_H
36: /*
37: * Provide bit manipulation macro's that resolve to a single instruction.
38: * These can be considered atomic on single processor architectures when
39: * no page faults can occur when acessing <var>.
40: * Their primary use is to avoid race conditions when manipulating device
41: * registers.
42: */
43:
44: #define single_inst_bset_b(var, bit) \
45: __asm__ __volatile__ ("orb %0,%1" : : "di" ((u_char)bit), "g" (var))
46: #define single_inst_bclr_b(var, bit) \
47: __asm__ __volatile__ ("andb %0,%1" : : "di" ((u_char)~(bit)), "g" (var));
48:
49: #define single_inst_bset_w(var, bit) \
50: __asm__ __volatile__ ("orw %0,%1" : : "di" ((u_short)bit), "g" (var))
51: #define single_inst_bclr_w(var, bit) \
52: __asm__ __volatile__ ("andw %0,%1" : : "di" ((u_short)~(bit)), "g" (var));
53:
54: #define single_inst_bset_l(var, bit) \
55: __asm__ __volatile__ ("orl %0,%1" : : "di" ((u_long)bit), "g" (var))
56: #define single_inst_bclr_l(var, bit) \
57: __asm__ __volatile__ ("andl %0,%1" : : "di" ((u_long)~(bit)), "g" (var));
58:
59: #endif /* _M68K_ASM_SINGLE_H */
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