Annotation of sys/arch/m68k/fpsp/x_fline.sa, Revision 1.1.1.1
1.1 nbrk 1: * $OpenBSD: x_fline.sa,v 1.2 1996/05/29 21:05:46 niklas Exp $
2: * $NetBSD: x_fline.sa,v 1.2 1994/10/26 07:50:23 cgd Exp $
3:
4: * MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
5: * M68000 Hi-Performance Microprocessor Division
6: * M68040 Software Package
7: *
8: * M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
9: * All rights reserved.
10: *
11: * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
12: * To the maximum extent permitted by applicable law,
13: * MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
14: * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
15: * PARTICULAR PURPOSE and any warranty against infringement with
16: * regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
17: * and any accompanying written materials.
18: *
19: * To the maximum extent permitted by applicable law,
20: * IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
21: * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
22: * PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
23: * OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
24: * SOFTWARE. Motorola assumes no responsibility for the maintenance
25: * and support of the SOFTWARE.
26: *
27: * You are hereby granted a copyright license to use, modify, and
28: * distribute the SOFTWARE so long as this entire notice is retained
29: * without alteration in any modified and/or redistributed versions,
30: * and that such modified versions are clearly identified as such.
31: * No licenses are granted by implication, estoppel or otherwise
32: * under any patents or trademarks of Motorola, Inc.
33:
34: *
35: * x_fline.sa 3.3 1/10/91
36: *
37: * fpsp_fline --- FPSP handler for fline exception
38: *
39: * First determine if the exception is one of the unimplemented
40: * floating point instructions. If so, let fpsp_unimp handle it.
41: * Next, determine if the instruction is an fmovecr with a non-zero
42: * <ea> field. If so, handle here and return. Otherwise, it
43: * must be a real F-line exception.
44: *
45:
46: X_FLINE IDNT 2,1 Motorola 040 Floating Point Software Package
47:
48: section 8
49:
50: include fpsp.h
51:
52: xref real_fline
53: xref fpsp_unimp
54: xref uni_2
55: xref mem_read
56: xref fpsp_fmt_error
57:
58: xdef fpsp_fline
59: fpsp_fline:
60: *
61: * check for unimplemented vector first. Use EXC_VEC-4 because
62: * the equate is valid only after a 'link a6' has pushed one more
63: * long onto the stack.
64: *
65: cmp.w #UNIMP_VEC,EXC_VEC-4(a7)
66: beq.l fpsp_unimp
67:
68: *
69: * fmovecr with non-zero <ea> handling here
70: *
71: sub.l #4,a7 ;4 accounts for 2-word difference
72: * ;between six word frame (unimp) and
73: * ;four word frame
74: link a6,#-LOCAL_SIZE
75: fsave -(a7)
76: movem.l d0-d1/a0-a1,USER_DA(a6)
77: movea.l EXC_PC+4(a6),a0 ;get address of fline instruction
78: lea.l L_SCR1(a6),a1 ;use L_SCR1 as scratch
79: move.l #4,d0
80: add.l #4,a6 ;to offset the sub.l #4,a7 above so that
81: * ;a6 can point correctly to the stack frame
82: * ;before branching to mem_read
83: bsr.l mem_read
84: sub.l #4,a6
85: move.l L_SCR1(a6),d0 ;d0 contains the fline and command word
86: bfextu d0{4:3},d1 ;extract coprocessor id
87: cmpi.b #1,d1 ;check if cpid=1
88: bne.w not_mvcr ;exit if not
89: bfextu d0{16:6},d1
90: cmpi.b #$17,d1 ;check if it is an FMOVECR encoding
91: bne.w not_mvcr
92: * ;if an FMOVECR instruction, fix stack
93: * ;and go to FPSP_UNIMP
94: fix_stack:
95: cmpi.b #VER_40,(a7) ;test for orig unimp frame
96: bne.b ck_rev
97: sub.l #UNIMP_40_SIZE-4,a7 ;emulate an orig fsave
98: move.b #VER_40,(a7)
99: move.b #UNIMP_40_SIZE-4,1(a7)
100: clr.w 2(a7)
101: bra.b fix_con
102: ck_rev:
103: cmpi.b #VER_41,(a7) ;test for rev unimp frame
104: bne.l fpsp_fmt_error ;if not $40 or $41, exit with error
105: sub.l #UNIMP_41_SIZE-4,a7 ;emulate a rev fsave
106: move.b #VER_41,(a7)
107: move.b #UNIMP_41_SIZE-4,1(a7)
108: clr.w 2(a7)
109: fix_con:
110: move.w EXC_SR+4(a6),EXC_SR(a6) ;move stacked sr to new position
111: move.l EXC_PC+4(a6),EXC_PC(a6) ;move stacked pc to new position
112: fmove.l EXC_PC(a6),FPIAR ;point FPIAR to fline inst
113: move.l #4,d1
114: add.l d1,EXC_PC(a6) ;increment stacked pc value to next inst
115: move.w #$202c,EXC_VEC(a6) ;reformat vector to unimp
116: clr.l EXC_EA(a6) ;clear the EXC_EA field
117: move.w d0,CMDREG1B(a6) ;move the lower word into CMDREG1B
118: clr.l E_BYTE(a6)
119: bset.b #UFLAG,T_BYTE(a6)
120: movem.l USER_DA(a6),d0-d1/a0-a1 ;restore data registers
121: bra.l uni_2
122:
123: not_mvcr:
124: movem.l USER_DA(a6),d0-d1/a0-a1 ;restore data registers
125: frestore (a7)+
126: unlk a6
127: add.l #4,a7
128: bra.l real_fline
129:
130: end
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