Annotation of sys/arch/m68k/fpsp/ssinh.sa, Revision 1.1.1.1
1.1 nbrk 1: * $OpenBSD: ssinh.sa,v 1.2 1996/05/29 21:05:42 niklas Exp $
2: * $NetBSD: ssinh.sa,v 1.3 1994/10/26 07:50:05 cgd Exp $
3:
4: * MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
5: * M68000 Hi-Performance Microprocessor Division
6: * M68040 Software Package
7: *
8: * M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
9: * All rights reserved.
10: *
11: * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
12: * To the maximum extent permitted by applicable law,
13: * MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
14: * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
15: * PARTICULAR PURPOSE and any warranty against infringement with
16: * regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
17: * and any accompanying written materials.
18: *
19: * To the maximum extent permitted by applicable law,
20: * IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
21: * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
22: * PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
23: * OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
24: * SOFTWARE. Motorola assumes no responsibility for the maintenance
25: * and support of the SOFTWARE.
26: *
27: * You are hereby granted a copyright license to use, modify, and
28: * distribute the SOFTWARE so long as this entire notice is retained
29: * without alteration in any modified and/or redistributed versions,
30: * and that such modified versions are clearly identified as such.
31: * No licenses are granted by implication, estoppel or otherwise
32: * under any patents or trademarks of Motorola, Inc.
33:
34: *
35: * ssinh.sa 3.1 12/10/90
36: *
37: * The entry point sSinh computes the hyperbolic sine of
38: * an input argument; sSinhd does the same except for denormalized
39: * input.
40: *
41: * Input: Double-extended number X in location pointed to
42: * by address register a0.
43: *
44: * Output: The value sinh(X) returned in floating-point register Fp0.
45: *
46: * Accuracy and Monotonicity: The returned result is within 3 ulps in
47: * 64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
48: * result is subsequently rounded to double precision. The
49: * result is provably monotonic in double precision.
50: *
51: * Speed: The program sSINH takes approximately 280 cycles.
52: *
53: * Algorithm:
54: *
55: * SINH
56: * 1. If |X| > 16380 log2, go to 3.
57: *
58: * 2. (|X| <= 16380 log2) Sinh(X) is obtained by the formulae
59: * y = |X|, sgn = sign(X), and z = expm1(Y),
60: * sinh(X) = sgn*(1/2)*( z + z/(1+z) ).
61: * Exit.
62: *
63: * 3. If |X| > 16480 log2, go to 5.
64: *
65: * 4. (16380 log2 < |X| <= 16480 log2)
66: * sinh(X) = sign(X) * exp(|X|)/2.
67: * However, invoking exp(|X|) may cause premature overflow.
68: * Thus, we calculate sinh(X) as follows:
69: * Y := |X|
70: * sgn := sign(X)
71: * sgnFact := sgn * 2**(16380)
72: * Y' := Y - 16381 log2
73: * sinh(X) := sgnFact * exp(Y').
74: * Exit.
75: *
76: * 5. (|X| > 16480 log2) sinh(X) must overflow. Return
77: * sign(X)*Huge*Huge to generate overflow and an infinity with
78: * the appropriate sign. Huge is the largest finite number in
79: * extended format. Exit.
80: *
81:
82: SSINH IDNT 2,1 Motorola 040 Floating Point Software Package
83:
84: section 8
85:
86: T1 DC.L $40C62D38,$D3D64634 ... 16381 LOG2 LEAD
87: T2 DC.L $3D6F90AE,$B1E75CC7 ... 16381 LOG2 TRAIL
88:
89: xref t_frcinx
90: xref t_ovfl
91: xref t_extdnrm
92: xref setox
93: xref setoxm1
94:
95: xdef ssinhd
96: ssinhd:
97: *--SINH(X) = X FOR DENORMALIZED X
98:
99: bra t_extdnrm
100:
101: xdef ssinh
102: ssinh:
103: FMOVE.x (a0),FP0 ...LOAD INPUT
104:
105: move.l (a0),d0
106: move.w 4(a0),d0
107: move.l d0,a1 save a copy of original (compacted) operand
108: AND.L #$7FFFFFFF,D0
109: CMP.L #$400CB167,D0
110: BGT.B SINHBIG
111:
112: *--THIS IS THE USUAL CASE, |X| < 16380 LOG2
113: *--Y = |X|, Z = EXPM1(Y), SINH(X) = SIGN(X)*(1/2)*( Z + Z/(1+Z) )
114:
115: FABS.X FP0 ...Y = |X|
116:
117: movem.l a1/d1,-(sp)
118: fmovem.x fp0,(a0)
119: clr.l d1
120: bsr setoxm1 ...FP0 IS Z = EXPM1(Y)
121: fmove.l #0,fpcr
122: movem.l (sp)+,a1/d1
123:
124: FMOVE.X FP0,FP1
125: FADD.S #:3F800000,FP1 ...1+Z
126: FMOVE.X FP0,-(sp)
127: FDIV.X FP1,FP0 ...Z/(1+Z)
128: MOVE.L a1,d0
129: AND.L #$80000000,D0
130: OR.L #$3F000000,D0
131: FADD.X (sp)+,FP0
132: MOVE.L D0,-(sp)
133:
134: fmove.l d1,fpcr
135: fmul.s (sp)+,fp0 ;last fp inst - possible exceptions set
136:
137: bra t_frcinx
138:
139: SINHBIG:
140: cmp.l #$400CB2B3,D0
141: bgt t_ovfl
142: FABS.X FP0
143: FSUB.D T1(pc),FP0 ...(|X|-16381LOG2_LEAD)
144: clr.l -(sp)
145: move.l #$80000000,-(sp)
146: move.l a1,d0
147: AND.L #$80000000,D0
148: OR.L #$7FFB0000,D0
149: MOVE.L D0,-(sp) ...EXTENDED FMT
150: FSUB.D T2(pc),FP0 ...|X| - 16381 LOG2, ACCURATE
151:
152: move.l d1,-(sp)
153: clr.l d1
154: fmovem.x fp0,(a0)
155: bsr setox
156: fmove.l (sp)+,fpcr
157:
158: fmul.x (sp)+,fp0 ;possible exception
159: bra t_frcinx
160:
161: end
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