Annotation of sys/arch/m68k/fpsp/smovecr.sa, Revision 1.1.1.1
1.1 nbrk 1: * $OpenBSD: smovecr.sa,v 1.2 1996/05/29 21:05:40 niklas Exp $
2: * $NetBSD: smovecr.sa,v 1.2 1994/10/26 07:49:57 cgd Exp $
3:
4: * MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
5: * M68000 Hi-Performance Microprocessor Division
6: * M68040 Software Package
7: *
8: * M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
9: * All rights reserved.
10: *
11: * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
12: * To the maximum extent permitted by applicable law,
13: * MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
14: * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
15: * PARTICULAR PURPOSE and any warranty against infringement with
16: * regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
17: * and any accompanying written materials.
18: *
19: * To the maximum extent permitted by applicable law,
20: * IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
21: * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
22: * PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
23: * OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
24: * SOFTWARE. Motorola assumes no responsibility for the maintenance
25: * and support of the SOFTWARE.
26: *
27: * You are hereby granted a copyright license to use, modify, and
28: * distribute the SOFTWARE so long as this entire notice is retained
29: * without alteration in any modified and/or redistributed versions,
30: * and that such modified versions are clearly identified as such.
31: * No licenses are granted by implication, estoppel or otherwise
32: * under any patents or trademarks of Motorola, Inc.
33:
34: *
35: * smovecr.sa 3.1 12/10/90
36: *
37: * The entry point sMOVECR returns the constant at the
38: * offset given in the instruction field.
39: *
40: * Input: An offset in the instruction word.
41: *
42: * Output: The constant rounded to the user's rounding
43: * mode unchecked for overflow.
44: *
45: * Modified: fp0.
46: *
47:
48: SMOVECR IDNT 2,1 Motorola 040 Floating Point Software Package
49:
50: section 8
51:
52: include fpsp.h
53:
54: xref nrm_set
55: xref round
56: xref PIRN
57: xref PIRZRM
58: xref PIRP
59: xref SMALRN
60: xref SMALRZRM
61: xref SMALRP
62: xref BIGRN
63: xref BIGRZRM
64: xref BIGRP
65:
66: FZERO dc.l 00000000
67: *
68: * FMOVECR
69: *
70: xdef smovcr
71: smovcr:
72: bfextu CMDREG1B(a6){9:7},d0 ;get offset
73: bfextu USER_FPCR(a6){26:2},d1 ;get rmode
74: *
75: * check range of offset
76: *
77: tst.b d0 ;if zero, offset is to pi
78: beq.b PI_TBL ;it is pi
79: cmpi.b #$0a,d0 ;check range $01 - $0a
80: ble.b Z_VAL ;if in this range, return zero
81: cmpi.b #$0e,d0 ;check range $0b - $0e
82: ble.b SM_TBL ;valid constants in this range
83: cmpi.b #$2f,d0 ;check range $10 - $2f
84: ble.b Z_VAL ;if in this range, return zero
85: cmpi.b #$3f,d0 ;check range $30 - $3f
86: ble BG_TBL ;valid constants in this range
87: Z_VAL:
88: fmove.s FZERO,fp0
89: rts
90: PI_TBL:
91: tst.b d1 ;offset is zero, check for rmode
92: beq.b PI_RN ;if zero, rn mode
93: cmpi.b #$3,d1 ;check for rp
94: beq.b PI_RP ;if 3, rp mode
95: PI_RZRM:
96: lea.l PIRZRM,a0 ;rmode is rz or rm, load PIRZRM in a0
97: bra set_finx
98: PI_RN:
99: lea.l PIRN,a0 ;rmode is rn, load PIRN in a0
100: bra set_finx
101: PI_RP:
102: lea.l PIRP,a0 ;rmode is rp, load PIRP in a0
103: bra set_finx
104: SM_TBL:
105: subi.l #$b,d0 ;make offset in 0 - 4 range
106: tst.b d1 ;check for rmode
107: beq.b SM_RN ;if zero, rn mode
108: cmpi.b #$3,d1 ;check for rp
109: beq.b SM_RP ;if 3, rp mode
110: SM_RZRM:
111: lea.l SMALRZRM,a0 ;rmode is rz or rm, load SMRZRM in a0
112: cmpi.b #$2,d0 ;check if result is inex
113: ble set_finx ;if 0 - 2, it is inexact
114: bra no_finx ;if 3, it is exact
115: SM_RN:
116: lea.l SMALRN,a0 ;rmode is rn, load SMRN in a0
117: cmpi.b #$2,d0 ;check if result is inex
118: ble set_finx ;if 0 - 2, it is inexact
119: bra no_finx ;if 3, it is exact
120: SM_RP:
121: lea.l SMALRP,a0 ;rmode is rp, load SMRP in a0
122: cmpi.b #$2,d0 ;check if result is inex
123: ble set_finx ;if 0 - 2, it is inexact
124: bra no_finx ;if 3, it is exact
125: BG_TBL:
126: subi.l #$30,d0 ;make offset in 0 - f range
127: tst.b d1 ;check for rmode
128: beq.b BG_RN ;if zero, rn mode
129: cmpi.b #$3,d1 ;check for rp
130: beq.b BG_RP ;if 3, rp mode
131: BG_RZRM:
132: lea.l BIGRZRM,a0 ;rmode is rz or rm, load BGRZRM in a0
133: cmpi.b #$1,d0 ;check if result is inex
134: ble set_finx ;if 0 - 1, it is inexact
135: cmpi.b #$7,d0 ;second check
136: ble no_finx ;if 0 - 7, it is exact
137: bra set_finx ;if 8 - f, it is inexact
138: BG_RN:
139: lea.l BIGRN,a0 ;rmode is rn, load BGRN in a0
140: cmpi.b #$1,d0 ;check if result is inex
141: ble set_finx ;if 0 - 1, it is inexact
142: cmpi.b #$7,d0 ;second check
143: ble no_finx ;if 0 - 7, it is exact
144: bra set_finx ;if 8 - f, it is inexact
145: BG_RP:
146: lea.l BIGRP,a0 ;rmode is rp, load SMRP in a0
147: cmpi.b #$1,d0 ;check if result is inex
148: ble set_finx ;if 0 - 1, it is inexact
149: cmpi.b #$7,d0 ;second check
150: ble no_finx ;if 0 - 7, it is exact
151: * bra set_finx ;if 8 - f, it is inexact
152: set_finx:
153: or.l #inx2a_mask,USER_FPSR(a6) ;set inex2/ainex
154: no_finx:
155: mulu.l #12,d0 ;use offset to point into tables
156: move.l d1,L_SCR1(a6) ;load mode for round call
157: bfextu USER_FPCR(a6){24:2},d1 ;get precision
158: tst.l d1 ;check if extended precision
159: *
160: * Precision is extended
161: *
162: bne.b not_ext ;if extended, do not call round
163: fmovem.x (a0,d0),fp0 ;return result in fp0
164: rts
165: *
166: * Precision is single or double
167: *
168: not_ext:
169: swap d1 ;rnd prec in upper word of d1
170: add.l L_SCR1(a6),d1 ;merge rmode in low word of d1
171: move.l (a0,d0),FP_SCR1(a6) ;load first word to temp storage
172: move.l 4(a0,d0),FP_SCR1+4(a6) ;load second word
173: move.l 8(a0,d0),FP_SCR1+8(a6) ;load third word
174: clr.l d0 ;clear g,r,s
175: lea FP_SCR1(a6),a0
176: btst.b #sign_bit,LOCAL_EX(a0)
177: sne LOCAL_SGN(a0) ;convert to internal ext. format
178:
179: bsr round ;go round the mantissa
180:
181: bfclr LOCAL_SGN(a0){0:8} ;convert back to IEEE ext format
182: beq.b fin_fcr
183: bset.b #sign_bit,LOCAL_EX(a0)
184: fin_fcr:
185: fmovem.x (a0),fp0
186: rts
187:
188: end
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