Annotation of sys/arch/m68k/fpsp/sasin.sa, Revision 1.1.1.1
1.1 nbrk 1: * $OpenBSD: sasin.sa,v 1.2 1996/05/29 21:05:34 niklas Exp $
2: * $NetBSD: sasin.sa,v 1.2 1994/10/26 07:49:29 cgd Exp $
3:
4: * MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
5: * M68000 Hi-Performance Microprocessor Division
6: * M68040 Software Package
7: *
8: * M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
9: * All rights reserved.
10: *
11: * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
12: * To the maximum extent permitted by applicable law,
13: * MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
14: * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
15: * PARTICULAR PURPOSE and any warranty against infringement with
16: * regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
17: * and any accompanying written materials.
18: *
19: * To the maximum extent permitted by applicable law,
20: * IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
21: * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
22: * PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
23: * OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
24: * SOFTWARE. Motorola assumes no responsibility for the maintenance
25: * and support of the SOFTWARE.
26: *
27: * You are hereby granted a copyright license to use, modify, and
28: * distribute the SOFTWARE so long as this entire notice is retained
29: * without alteration in any modified and/or redistributed versions,
30: * and that such modified versions are clearly identified as such.
31: * No licenses are granted by implication, estoppel or otherwise
32: * under any patents or trademarks of Motorola, Inc.
33:
34: *
35: * sasin.sa 3.3 12/19/90
36: *
37: * Description: The entry point sAsin computes the inverse sine of
38: * an input argument; sAsind does the same except for denormalized
39: * input.
40: *
41: * Input: Double-extended number X in location pointed to
42: * by address register a0.
43: *
44: * Output: The value arcsin(X) returned in floating-point register Fp0.
45: *
46: * Accuracy and Monotonicity: The returned result is within 3 ulps in
47: * 64 significant bit, i.e. within 0.5001 ulp to 53 bits if the
48: * result is subsequently rounded to double precision. The
49: * result is provably monotonic in double precision.
50: *
51: * Speed: The program sASIN takes approximately 310 cycles.
52: *
53: * Algorithm:
54: *
55: * ASIN
56: * 1. If |X| >= 1, go to 3.
57: *
58: * 2. (|X| < 1) Calculate asin(X) by
59: * z := sqrt( [1-X][1+X] )
60: * asin(X) = atan( x / z ).
61: * Exit.
62: *
63: * 3. If |X| > 1, go to 5.
64: *
65: * 4. (|X| = 1) sgn := sign(X), return asin(X) := sgn * Pi/2. Exit.
66: *
67: * 5. (|X| > 1) Generate an invalid operation by 0 * infinity.
68: * Exit.
69: *
70:
71: SASIN IDNT 2,1 Motorola 040 Floating Point Software Package
72:
73: section 8
74:
75: PIBY2 DC.L $3FFF0000,$C90FDAA2,$2168C235,$00000000
76:
77: xref t_operr
78: xref t_frcinx
79: xref t_extdnrm
80: xref satan
81:
82: xdef sasind
83: sasind:
84: *--ASIN(X) = X FOR DENORMALIZED X
85:
86: bra t_extdnrm
87:
88: xdef sasin
89: sasin:
90: FMOVE.X (a0),FP0 ...LOAD INPUT
91:
92: move.l (a0),d0
93: move.w 4(a0),d0
94: ANDI.L #$7FFFFFFF,D0
95: CMPI.L #$3FFF8000,D0
96: BGE.B asinbig
97:
98: *--THIS IS THE USUAL CASE, |X| < 1
99: *--ASIN(X) = ATAN( X / SQRT( (1-X)(1+X) ) )
100:
101: FMOVE.S #:3F800000,FP1
102: FSUB.X FP0,FP1 ...1-X
103: fmovem.x fp2,-(a7)
104: FMOVE.S #:3F800000,FP2
105: FADD.X FP0,FP2 ...1+X
106: FMUL.X FP2,FP1 ...(1+X)(1-X)
107: fmovem.x (a7)+,fp2
108: FSQRT.X FP1 ...SQRT([1-X][1+X])
109: FDIV.X FP1,FP0 ...X/SQRT([1-X][1+X])
110: fmovem.x fp0,(a0)
111: bsr satan
112: bra t_frcinx
113:
114: asinbig:
115: FABS.X FP0 ...|X|
116: FCMP.S #:3F800000,FP0
117: fbgt t_operr ;cause an operr exception
118:
119: *--|X| = 1, ASIN(X) = +- PI/2.
120:
121: FMOVE.X PIBY2,FP0
122: move.l (a0),d0
123: ANDI.L #$80000000,D0 ...SIGN BIT OF X
124: ORI.L #$3F800000,D0 ...+-1 IN SGL FORMAT
125: MOVE.L D0,-(sp) ...push SIGN(X) IN SGL-FMT
126: FMOVE.L d1,FPCR
127: FMUL.S (sp)+,FP0
128: bra t_frcinx
129:
130: end
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