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1.1 nbrk 1: * $OpenBSD: l_support.sa,v 1.2 1996/05/29 21:05:31 niklas Exp $
2: * $NetBSD: l_support.sa,v 1.3 1994/10/26 07:49:16 cgd Exp $
3:
4: * MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
5: * M68000 Hi-Performance Microprocessor Division
6: * M68040 Software Package
7: *
8: * M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
9: * All rights reserved.
10: *
11: * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
12: * To the maximum extent permitted by applicable law,
13: * MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
14: * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
15: * PARTICULAR PURPOSE and any warranty against infringement with
16: * regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
17: * and any accompanying written materials.
18: *
19: * To the maximum extent permitted by applicable law,
20: * IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
21: * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
22: * PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
23: * OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
24: * SOFTWARE. Motorola assumes no responsibility for the maintenance
25: * and support of the SOFTWARE.
26: *
27: * You are hereby granted a copyright license to use, modify, and
28: * distribute the SOFTWARE so long as this entire notice is retained
29: * without alteration in any modified and/or redistributed versions,
30: * and that such modified versions are clearly identified as such.
31: * No licenses are granted by implication, estoppel or otherwise
32: * under any patents or trademarks of Motorola, Inc.
33:
34: *
35: * l_support.sa 1.2 5/1/91
36: *
37:
38: L_SUPPORT IDNT 2,1 Motorola 040 Floating Point Software Package
39:
40: section 8
41:
42: mns_one dc.l $bfff0000,$80000000,$00000000
43: pls_one dc.l $3fff0000,$80000000,$00000000
44: pls_inf dc.l $7fff0000,$00000000,$00000000
45: pls_huge dc.l $7ffe0000,$ffffffff,$ffffffff
46: mns_huge dc.l $fffe0000,$ffffffff,$ffffffff
47: pls_tiny dc.l $00000000,$80000000,$00000000
48: mns_tiny dc.l $80000000,$80000000,$00000000
49: small dc.l $20000000,$80000000,$00000000
50: pls_zero dc.l $00000000,$00000000,$00000000
51:
52: include l_fpsp.h
53:
54: *
55: * tag --- determine the type of an extended precision operand
56: *
57: * The tag values returned match the way the 68040 would have
58: * tagged them.
59: *
60: * Input: a0 points to operand
61: *
62: * Output d0.b = $00 norm
63: * $20 zero
64: * $40 inf
65: * $60 nan
66: * $80 denorm
67: * All other registers are unchanged
68: *
69: xdef tag
70: tag:
71: move.w LOCAL_EX(a0),d0
72: andi.w #$7fff,d0
73: beq.b chk_zro
74: cmpi.w #$7fff,d0
75: beq.b chk_inf
76: tag_nrm:
77: clr.b d0
78: rts
79: tag_nan:
80: move.b #$60,d0
81: rts
82: tag_dnrm:
83: move.b #$80,d0
84: rts
85: chk_zro:
86: btst.b #7,LOCAL_HI(a0) # check if J-bit is set
87: bne.b tag_nrm
88: tst.l LOCAL_HI(a0)
89: bne.b tag_dnrm
90: tst.l LOCAL_LO(a0)
91: bne.b tag_dnrm
92: tag_zero:
93: move.b #$20,d0
94: rts
95: chk_inf:
96: tst.l LOCAL_HI(a0)
97: bne.b tag_nan
98: tst.l LOCAL_LO(a0)
99: bne.b tag_nan
100: tag_inf:
101: move.b #$40,d0
102: rts
103:
104: *
105: * t_dz, t_dz2 --- divide by zero exception
106: *
107: * t_dz2 is used by monadic functions such as flogn (from do_func).
108: * t_dz is used by monadic functions such as satanh (from the
109: * transcendental function).
110: *
111: xdef t_dz2
112: t_dz2:
113: fmovem.x mns_one,fp0
114: fmove.l d1,fpcr
115: fdiv.x pls_zero,fp0
116: rts
117:
118: xdef t_dz
119: t_dz:
120: btst.b #sign_bit,ETEMP_EX(a6) ;check sign for neg or pos
121: beq.b p_inf ;branch if pos sign
122: m_inf:
123: fmovem.x mns_one,fp0
124: fmove.l d1,fpcr
125: fdiv.x pls_zero,fp0
126: rts
127: p_inf:
128: fmovem.x pls_one,fp0
129: fmove.l d1,fpcr
130: fdiv.x pls_zero,fp0
131: rts
132: *
133: * t_operr --- Operand Error exception
134: *
135: xdef t_operr
136: t_operr:
137: fmovem.x pls_inf,fp0
138: fmove.l d1,fpcr
139: fmul.x pls_zero,fp0
140: rts
141:
142: *
143: * t_unfl --- UNFL exception
144: *
145: xdef t_unfl
146: t_unfl:
147: btst.b #sign_bit,ETEMP(a6)
148: beq.b unf_pos
149: unf_neg:
150: fmovem.x mns_tiny,fp0
151: fmove.l d1,fpcr
152: fmul.x pls_tiny,fp0
153: rts
154:
155: unf_pos:
156: fmovem.x pls_tiny,fp0
157: fmove.l d1,fpcr
158: fmul.x fp0,fp0
159: rts
160: *
161: * t_ovfl --- OVFL exception
162: *
163: * t_ovfl is called as an exit for monadic functions. t_ovfl2
164: * is for dyadic exits.
165: *
166: xdef t_ovfl
167: t_ovfl:
168: xdef t_ovfl2
169: move.l d1,USER_FPCR(a6) user's control register
170: move.l #ovfinx_mask,d0
171: bra.b t_work
172: t_ovfl2:
173: move.l #ovfl_inx_mask,d0
174: t_work:
175: btst.b #sign_bit,ETEMP(a6)
176: beq.b ovf_pos
177: ovf_neg:
178: fmovem.x mns_huge,fp0
179: fmove.l USER_FPCR(a6),fpcr
180: fmul.x pls_huge,fp0
181: fmove.l fpsr,d1
182: or.l d1,d0
183: fmove.l d0,fpsr
184: rts
185: ovf_pos:
186: fmovem.x pls_huge,fp0
187: fmove.l USER_FPCR(a6),fpcr
188: fmul.x pls_huge,fp0
189: fmove.l fpsr,d1
190: or.l d1,d0
191: fmove.l d0,fpsr
192: rts
193: *
194: * t_inx2 --- INEX2 exception (correct fpcr is in USER_FPCR(a6))
195: *
196: xdef t_inx2
197: t_inx2:
198: fmove.l fpsr,USER_FPSR(a6) capture incoming fpsr
199: fmove.l USER_FPCR(a6),fpcr
200: *
201: * create an inex2 exception by adding two numbers with very different exponents
202: * do the add in fp1 so as to not disturb the result sitting in fp0
203: *
204: fmove.x pls_one,fp1
205: fadd.x small,fp1
206: *
207: or.l #inx2a_mask,USER_FPSR(a6) ;set INEX2, AINEX
208: fmove.l USER_FPSR(a6),fpsr
209: rts
210: *
211: * t_frcinx --- Force Inex2 (for monadic functions)
212: *
213: xdef t_frcinx
214: t_frcinx:
215: fmove.l fpsr,USER_FPSR(a6) capture incoming fpsr
216: fmove.l d1,fpcr
217: *
218: * create an inex2 exception by adding two numbers with very different exponents
219: * do the add in fp1 so as to not disturb the result sitting in fp0
220: *
221: fmove.x pls_one,fp1
222: fadd.x small,fp1
223: *
224: or.l #inx2a_mask,USER_FPSR(a6) ;set INEX2, AINEX
225: btst.b #unfl_bit,FPSR_EXCEPT(a6) ;test for unfl bit set
226: beq.b no_uacc1 ;if clear, do not set aunfl
227: bset.b #aunfl_bit,FPSR_AEXCEPT(a6)
228: no_uacc1:
229: fmove.l USER_FPSR(a6),fpsr
230: rts
231: *
232: * dst_nan --- force result when destination is a NaN
233: *
234: xdef dst_nan
235: dst_nan:
236: fmove.l USER_FPCR(a6),fpcr
237: fmove.x FPTEMP(a6),fp0
238: rts
239:
240: *
241: * src_nan --- force result when source is a NaN
242: *
243: xdef src_nan
244: src_nan:
245: fmove.l USER_FPCR(a6),fpcr
246: fmove.x ETEMP(a6),fp0
247: rts
248: *
249: * mon_nan --- force result when source is a NaN (monadic version)
250: *
251: * This is the same as src_nan except that the user's fpcr comes
252: * in via d1, not USER_FPCR(a6).
253: *
254: xdef mon_nan
255: mon_nan:
256: fmove.l d1,fpcr
257: fmove.x ETEMP(a6),fp0
258: rts
259: *
260: * t_extdnrm, t_resdnrm --- generate results for denorm inputs
261: *
262: * For all functions that have a denormalized input and that f(x)=x,
263: * this is the entry point.
264: *
265: xdef t_extdnrm
266: t_extdnrm:
267: fmove.l d1,fpcr
268: fmove.x LOCAL_EX(a0),fp0
269: fmove.l fpsr,d0
270: or.l #unfinx_mask,d0
271: fmove.l d0,fpsr
272: rts
273:
274: xdef t_resdnrm
275: t_resdnrm:
276: fmove.l USER_FPCR(a6),fpcr
277: fmove.x LOCAL_EX(a0),fp0
278: fmove.l fpsr,d0
279: or.l #unfl_mask,d0
280: fmove.l d0,fpsr
281: rts
282: *
283: *
284: *
285: xdef t_avoid_unsupp
286: t_avoid_unsupp:
287: fmove.x fp0,fp0
288: rts
289:
290: xdef sto_cos
291: sto_cos:
292: fmovem.x LOCAL_EX(a0),fp1
293: rts
294: *
295: * Native instruction support
296: *
297: * Some systems may need entry points even for 68040 native
298: * instructions. These routines are provided for
299: * convenience.
300: *
301: xdef sadd
302: sadd:
303: fmovem.x FPTEMP(a6),fp0
304: fmove.l USER_FPCR(a6),fpcr
305: fadd.x ETEMP(a6),fp0
306: rts
307:
308: xdef ssub
309: ssub:
310: fmovem.x FPTEMP(a6),fp0
311: fmove.l USER_FPCR(a6),fpcr
312: fsub.x ETEMP(a6),fp0
313: rts
314:
315: xdef smul
316: smul:
317: fmovem.x FPTEMP(a6),fp0
318: fmove.l USER_FPCR(a6),fpcr
319: fmul.x ETEMP(a6),fp0
320: rts
321:
322: xdef sdiv
323: sdiv:
324: fmovem.x FPTEMP(a6),fp0
325: fmove.l USER_FPCR(a6),fpcr
326: fdiv.x ETEMP(a6),fp0
327: rts
328:
329: xdef sabs
330: sabs:
331: fmovem.x ETEMP(a6),fp0
332: fmove.l d1,fpcr
333: fabs.x fp0
334: rts
335:
336: xdef sneg
337: sneg:
338: fmovem.x ETEMP(a6),fp0
339: fmove.l d1,fpcr
340: fneg.x fp0
341: rts
342:
343: xdef ssqrt
344: ssqrt:
345: fmovem.x ETEMP(a6),fp0
346: fmove.l d1,fpcr
347: fsqrt.x fp0
348: rts
349:
350: *
351: * l_sint,l_sintrz,l_sintd --- special wrapper for fint and fintrz
352: *
353: * On entry, move the user's FPCR to USER_FPCR.
354: *
355: * On return from, we need to pickup the INEX2/AINEX bits
356: * that are in USER_FPSR.
357: *
358: xref sint
359: xref sintrz
360: xref sintd
361:
362: xdef l_sint
363: l_sint:
364: move.l d1,USER_FPCR(a6)
365: jsr sint
366: fmove.l fpsr,d0
367: or.l USER_FPSR(a6),d0
368: fmove.l d0,fpsr
369: rts
370:
371: xdef l_sintrz
372: l_sintrz:
373: move.l d1,USER_FPCR(a6)
374: jsr sintrz
375: fmove.l fpsr,d0
376: or.l USER_FPSR(a6),d0
377: fmove.l d0,fpsr
378: rts
379:
380: xdef l_sintd
381: l_sintd:
382: move.l d1,USER_FPCR(a6)
383: jsr sintd
384: fmove.l fpsr,d0
385: or.l USER_FPSR(a6),d0
386: fmove.l d0,fpsr
387: rts
388:
389: end