Annotation of sys/arch/m68k/fpsp/l_fpsp.h, Revision 1.1.1.1
1.1 nbrk 1: * $OpenBSD: l_fpsp.h,v 1.3 2007/04/10 17:47:54 miod Exp $
2: * $NetBSD: l_fpsp.h,v 1.2 1994/10/26 07:49:14 cgd Exp $
3:
4: * MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
5: * M68000 Hi-Performance Microprocessor Division
6: * M68040 Software Package
7: *
8: * M68040 Software Package Copyright (c) 1993, 1994 Motorola Inc.
9: * All rights reserved.
10: *
11: * THE SOFTWARE is provided on an "AS IS" basis and without warranty.
12: * To the maximum extent permitted by applicable law,
13: * MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
14: * INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A
15: * PARTICULAR PURPOSE and any warranty against infringement with
16: * regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
17: * and any accompanying written materials.
18: *
19: * To the maximum extent permitted by applicable law,
20: * IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
21: * (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS
22: * PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR
23: * OTHER PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE
24: * SOFTWARE. Motorola assumes no responsibility for the maintenance
25: * and support of the SOFTWARE.
26: *
27: * You are hereby granted a copyright license to use, modify, and
28: * distribute the SOFTWARE so long as this entire notice is retained
29: * without alteration in any modified and/or redistributed versions,
30: * and that such modified versions are clearly identified as such.
31: * No licenses are granted by implication, estoppel or otherwise
32: * under any patents or trademarks of Motorola, Inc.
33:
34: *
35: * l_fpsp.h 1.2 5/1/91
36: *
37:
38: * l_fpsp.h --- stack frame offsets for library version of FPSP
39: *
40: * This file is derived from fpsp.h. All equates that refer
41: * to the fsave frame and its bits are removed with the
42: * exception of ETEMP, WBTEMP, DTAG and STAG which are simulated
43: * in the library version. Equates for the exception frame are
44: * also not needed. Some of the equates that are only used in
45: * the kernel version of the FPSP are left in to minimize the
46: * differences between this file and the original.
47: *
48: * The library routines use the same source files as the regular
49: * kernel mode code so they expect the same setup. That is, you
50: * must create enough space on the stack for all save areas and
51: * work variables that are needed, and save any registers that
52: * your compiler does not treat as scratch registers on return
53: * from function calls.
54: *
55: * The worst case setup is:
56: *
57: * link a6,#-LOCAL_SIZE
58: * movem.l d0-d1/a0-a1,USER_DA(a6)
59: * fmovem.x fp0-fp3,USER_FP0(a6)
60: * fmovem.l fpsr/fpcr,USER_FPSR(a6)
61: *
62: * After initialization, the stack looks like this:
63: *
64: * A7 ---> +-------------------------------+
65: * | |
66: * | FPSP Local Variables |
67: * | including |
68: * | saved registers |
69: * | |
70: * +-------------------------------+
71: * A6 ---> | Saved A6 |
72: * +-------------------------------+
73: * | Return PC |
74: * +-------------------------------+
75: * | Arguments to |
76: * | an FPSP library |
77: * | package |
78: * | |
79: *
80: * Positive offsets from A6 refer to the input arguments. Negative
81: * offsets refer to the Local Variable area.
82: *
83: * On exit, execute:
84: *
85: * movem.l USER_DA(a6),d0-d1/a0-a1
86: * fmovem.x USER_FP0(a6),fp0-fp3
87: * fmove.l USER_FPSR(a6),fpsr/fpcr
88: * unlk a6
89: * rts
90: *
91: * Many 68K C compilers treat a0/a1/d0/d1/fp0/fp1 as scratch so
92: * a simplified setup/exit is possible:
93: *
94: * link a6,#-LOCAL_SIZE
95: * fmovem.x fp2-fp3,USER_FP2(a6)
96: * fmove.l fpsr/fpcr,USER_FPSR(a6)
97: *
98: * [call appropriate emulation routine]
99: *
100: * fmovem.x USER_FP2(a6),fp2-fp3
101: * fmove.l USER_FPSR(a6),fpsr/fpcr
102: * unlk a6
103: * rts
104: *
105: * Note that you must still save fp2/fp3 because the FPSP emulation
106: * routines expect fp0-fp3 as scratch registers. For all monadic
107: * entry points, the caller should save the fpcr in d1 and zero the
108: * real fpcr before calling the emulation routine. On return, the
109: * monadic emulation code will place the value supplied in d1 back
110: * into the fpcr and do a single floating point operation so that
111: * the final result will be correctly rounded and any specified
112: * exceptions will be generated.
113: *
114: *----------------------------------------------------------------------
115: *
116: * Local Variables on the stack
117: *
118: LOCAL_SIZE equ 228 ;bytes needed for local variables
119: LV equ -LOCAL_SIZE ;convenient base value
120: *
121: USER_DA equ LV+0 ;save space for D0-D1,A0-A1
122: USER_D0 equ LV+0 ;saved user D0
123: USER_D1 equ LV+4 ;saved user D1
124: USER_A0 equ LV+8 ;saved user A0
125: USER_A1 equ LV+12 ;saved user A1
126: USER_FP0 equ LV+16 ;saved user FP0
127: USER_FP1 equ LV+28 ;saved user FP1
128: USER_FP2 equ LV+40 ;saved user FP2
129: USER_FP3 equ LV+52 ;saved user FP3
130: USER_FPCR equ LV+64 ;saved user FPCR
131: FPCR_ENABLE equ USER_FPCR+2 ; FPCR exception enable
132: FPCR_MODE equ USER_FPCR+3 ; FPCR rounding mode control
133: USER_FPSR equ LV+68 ;saved user FPSR
134: FPSR_CC equ USER_FPSR+0 ; FPSR condition code
135: FPSR_QBYTE equ USER_FPSR+1 ; FPSR quotient
136: FPSR_EXCEPT equ USER_FPSR+2 ; FPSR exception
137: FPSR_AEXCEPT equ USER_FPSR+3 ; FPSR accrued exception
138: USER_FPIAR equ LV+72 ;saved user FPIAR
139: FP_SCR1 equ LV+76 ;room for a temporary float value
140: FP_SCR2 equ LV+92 ;room for a temporary float value
141: L_SCR1 equ LV+108 ;room for a temporary long value
142: L_SCR2 equ LV+112 ;room for a temporary long value
143: STORE_FLG equ LV+116
144: BINDEC_FLG equ LV+117 ;used in bindec
145: DNRM_FLG equ LV+118 ;used in res_func
146: RES_FLG equ LV+119 ;used in res_func
147: DY_MO_FLG equ LV+120 ;dyadic/monadic flag
148: UFLG_TMP equ LV+121 ;temporary for uflag errata
149: CU_ONLY equ LV+122 ;cu-only flag
150: VER_TMP equ LV+123 ;temp holding for version number
151: L_SCR3 equ LV+124 ;room for a temporary long value
152: FP_SCR3 equ LV+128 ;room for a temporary float value
153: FP_SCR4 equ LV+144 ;room for a temporary float value
154: FP_SCR5 equ LV+160 ;room for a temporary float value
155: FP_SCR6 equ LV+176
156: *
157: *--------------------------------------------------------------------------
158: *
159: STAG equ LV+192 ;source tag (1 byte)
160: *
161: DTAG equ LV+193 ;dest tag (1 byte)
162: *
163: FPTEMP equ LV+196 ;fptemp (12 bytes)
164: FPTEMP_EX equ FPTEMP ;fptemp sign and exponent (2 bytes)
165: FPTEMP_HI equ FPTEMP+4 ;fptemp mantissa [63:32] (4 bytes)
166: FPTEMP_LO equ FPTEMP+8 ;fptemp mantissa [31:00] (4 bytes)
167: *
168: FPTEMP_SGN equ FPTEMP+2 ;used to store sign
169: *
170: ETEMP equ LV+208 ;etemp (12 bytes)
171: ETEMP_EX equ ETEMP ;etemp sign and exponent (2 bytes)
172: ETEMP_HI equ ETEMP+4 ;etemp mantissa [63:32] (4 bytes)
173: ETEMP_LO equ ETEMP+8 ;etemp mantissa [31:00] (4 bytes)
174: *
175: ETEMP_SGN equ ETEMP+2 ;used to store sign
176: *
177: *--------------------------------------------------------------------------
178: *
179: * FPSR/FPCR bits
180: *
181: neg_bit equ 3 negative result
182: z_bit equ 2 zero result
183: inf_bit equ 1 infinity result
184: nan_bit equ 0 not-a-number result
185: *
186: q_sn_bit equ 7 sign bit of quotient byte
187: *
188: bsun_bit equ 7 branch on unordered
189: snan_bit equ 6 signalling nan
190: operr_bit equ 5 operand error
191: ovfl_bit equ 4 overflow
192: unfl_bit equ 3 underflow
193: dz_bit equ 2 divide by zero
194: inex2_bit equ 1 inexact result 2
195: inex1_bit equ 0 inexact result 1
196: *
197: aiop_bit equ 7 accrued illegal operation
198: aovfl_bit equ 6 accrued overflow
199: aunfl_bit equ 5 accrued underflow
200: adz_bit equ 4 accrued divide by zero
201: ainex_bit equ 3 accrued inexact
202: *
203: * FPSR individual bit masks
204: *
205: neg_mask equ $08000000
206: z_mask equ $04000000
207: inf_mask equ $02000000
208: nan_mask equ $01000000
209: *
210: bsun_mask equ $00008000
211: snan_mask equ $00004000
212: operr_mask equ $00002000
213: ovfl_mask equ $00001000
214: unfl_mask equ $00000800
215: dz_mask equ $00000400
216: inex2_mask equ $00000200
217: inex1_mask equ $00000100
218: *
219: aiop_mask equ $00000080 accrued illegal operation
220: aovfl_mask equ $00000040 accrued overflow
221: aunfl_mask equ $00000020 accrued underflow
222: adz_mask equ $00000010 accrued divide by zero
223: ainex_mask equ $00000008 accrued inexact
224: *
225: * FPSR combinations used in the FPSP
226: *
227: dzinf_mask equ inf_mask+dz_mask+adz_mask
228: opnan_mask equ nan_mask+operr_mask+aiop_mask
229: nzi_mask equ $01ffffff clears N, Z, and I
230: unfinx_mask equ unfl_mask+inex2_mask+aunfl_mask+ainex_mask
231: unf2inx_mask equ unfl_mask+inex2_mask+ainex_mask
232: ovfinx_mask equ ovfl_mask+inex2_mask+aovfl_mask+ainex_mask
233: inx1a_mask equ inex1_mask+ainex_mask
234: inx2a_mask equ inex2_mask+ainex_mask
235: snaniop_mask equ nan_mask+snan_mask+aiop_mask
236: naniop_mask equ nan_mask+aiop_mask
237: neginf_mask equ neg_mask+inf_mask
238: infaiop_mask equ inf_mask+aiop_mask
239: negz_mask equ neg_mask+z_mask
240: opaop_mask equ operr_mask+aiop_mask
241: unfl_inx_mask equ unfl_mask+aunfl_mask+ainex_mask
242: ovfl_inx_mask equ ovfl_mask+aovfl_mask+ainex_mask
243: *
244: *--------------------------------------------------------------------------
245: *
246: * FPCR rounding modes
247: *
248: x_mode equ $00 round to extended
249: s_mode equ $40 round to single
250: d_mode equ $80 round to double
251: *
252: rn_mode equ $00 round nearest
253: rz_mode equ $10 round to zero
254: rm_mode equ $20 round to minus infinity
255: rp_mode equ $30 round to plus infinity
256: *
257: *--------------------------------------------------------------------------
258: *
259: * Miscellaneous equates
260: *
261: signan_bit equ 6 signalling nan bit in mantissa
262: sign_bit equ 7
263: *
264: rnd_stky_bit equ 29 round/sticky bit of mantissa
265: * this can only be used if in a data register
266: LOCAL_EX equ 0
267: LOCAL_SGN equ 2
268: LOCAL_HI equ 4
269: LOCAL_LO equ 8
270: LOCAL_GRS equ 12 valid ONLY for FP_SCR1, FP_SCR2
271: *
272: *
273: norm_tag equ $00 tag bits in {7:5} position
274: zero_tag equ $20
275: inf_tag equ $40
276: nan_tag equ $60
277: dnrm_tag equ $80
278: *
279: dbl_thresh equ $3C01
280: sgl_thresh equ $3F81
281: *
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