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Annotation of sys/arch/m68k/fpe/fpu_fmovecr.c, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: fpu_fmovecr.c,v 1.8 2006/06/11 20:43:28 miod Exp $    */
                      2: /*     $NetBSD: fpu_fmovecr.c,v 1.10 2003/07/15 02:43:09 lukem Exp $   */
                      3:
                      4: /*
                      5:  * Copyright (c) 1995  Ken Nakata
                      6:  *     All rights reserved.
                      7:  *
                      8:  * Redistribution and use in source and binary forms, with or without
                      9:  * modification, are permitted provided that the following conditions
                     10:  * are met:
                     11:  * 1. Redistributions of source code must retain the above copyright
                     12:  *    notice, this list of conditions and the following disclaimer.
                     13:  * 2. Redistributions in binary form must reproduce the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer in the
                     15:  *    documentation and/or other materials provided with the distribution.
                     16:  * 3. Neither the name of the author nor the names of its contributors
                     17:  *    may be used to endorse or promote products derived from this software
                     18:  *    without specific prior written permission.
                     19:  *
                     20:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
                     21:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
                     22:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
                     23:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
                     24:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
                     25:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
                     26:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     27:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
                     28:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
                     29:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
                     30:  * SUCH DAMAGE.
                     31:  *
                     32:  *     @(#)fpu_fmovecr.c       10/8/95
                     33:  */
                     34:
                     35: #include <sys/param.h>
                     36: #include <sys/systm.h>
                     37: #include <machine/frame.h>
                     38:
                     39: #include <m68k/fpe/fpu_emulate.h>
                     40:
                     41: /* XXX: quick consistency check */
                     42: #if (FP_1 != 0x40000)
                     43: Error you have to change this table when changing the mantissa size
                     44: #endif
                     45:
                     46: static struct fpn constrom[] = {
                     47:     /* fp_class, fp_sign, fp_exp, fp_sticky, fp_mant[0] ... [2] */
                     48:     { FPC_NUM, 0, 1, 0, { 0x6487e, 0xd5110b46, 0x11a80000 } },
                     49:     { FPC_NUM, 0, -2, 0, { 0x4d104, 0xd427de7f, 0xbcc00000 } },
                     50:     { FPC_NUM, 0, 1, 0, { 0x56fc2, 0xa2c515da, 0x54d00000 } },
                     51:     { FPC_NUM, 0, 0, 0, { 0x5c551, 0xd94ae0bf, 0x85e00000 } },
                     52:     { FPC_NUM, 0, -2, 0, { 0x6f2de, 0xc549b943, 0x8ca80000 } },
                     53:     { FPC_ZERO, 0, 0, 0, { 0x0, 0x0, 0x0 } },
                     54:     { FPC_NUM, 0, -1, 0, { 0x58b90, 0xbfbe8e7b, 0xcd600000 } },
                     55:     { FPC_NUM, 0, 1, 0, { 0x49aec, 0x6eed5545, 0x60b80000 } },
                     56:     { FPC_NUM, 0, 0, 0, { 0x40000, 0x0, 0x0 } },
                     57:     { FPC_NUM, 0, 3, 0, { 0x50000, 0x0, 0x0 } },
                     58:     { FPC_NUM, 0, 6, 0, { 0x64000, 0x0, 0x0 } },
                     59:     { FPC_NUM, 0, 13, 0, { 0x4e200, 0x0, 0x0 } },
                     60:     { FPC_NUM, 0, 26, 0, { 0x5f5e1, 0x0, 0x0 } },
                     61:     { FPC_NUM, 0, 53, 0, { 0x470de, 0x4df82000, 0x0 } },
                     62:     { FPC_NUM, 0, 106, 0, { 0x4ee2d, 0x6d415b85, 0xacf00000 } },
                     63:     { FPC_NUM, 0, 212, 0, { 0x613c0, 0xfa4ffe7d, 0x36a80000 } },
                     64:     { FPC_NUM, 0, 425, 0, { 0x49dd2, 0x3e4c074c, 0x67000000 } },
                     65:     { FPC_NUM, 0, 850, 0, { 0x553f7, 0x5fdcefce, 0xf4700000 } },
                     66:     { FPC_NUM, 0, 1700, 0, { 0x718cd, 0x5753074, 0x8e380000 } },
                     67:     { FPC_NUM, 0, 3401, 0, { 0x64bb3, 0xac340ba8, 0x60b80000 } },
                     68:     { FPC_NUM, 0, 6803, 0, { 0x4f459, 0xdaee29ea, 0xef280000 } },
                     69:     { FPC_NUM, 0, 13606, 0, { 0x62302, 0x90145104, 0xbcd80000 } },
                     70: };
                     71:
                     72: struct fpn *
                     73: fpu_const(fp, offset)
                     74:      struct fpn *fp;
                     75:      u_int offset;
                     76: {
                     77:     struct fpn *r;
                     78:
                     79: #ifdef DEBUG
                     80:     if (fp == NULL) {
                     81:        panic("fpu_const: NULL pointer passed");
                     82:     }
                     83: #endif
                     84:     if (offset == 0) {
                     85:        r = &constrom[0];
                     86:     } else if (0xb <= offset && offset <= 0xe) {
                     87:        r = &constrom[offset - 0xb + 1];
                     88:     } else if (0x30 <= offset && offset <= 0x3f) {
                     89:        r = &constrom[offset - 0x30 + 6];
                     90:     } else {
                     91:        /* return 0.0 for anything else (incl. valid offset 0xf) */
                     92:        r = &constrom[5];
                     93:     }
                     94:
                     95:     CPYFPN(fp, r);
                     96:
                     97:     return fp;
                     98: }
                     99:
                    100: int
                    101: fpu_emul_fmovecr(struct fpemu *fe, struct instruction *insn, int *typ)
                    102: {
                    103:     int dstreg, offset;
                    104:     u_int *fpreg;
                    105:
                    106:     dstreg = (insn->is_word1 >> 7) & 0x7;
                    107:     offset = insn->is_word1 & 0x7F;
                    108:     fpreg = &(fe->fe_fpframe->fpf_regs[0]);
                    109:
                    110:     (void)fpu_const(&fe->fe_f3, offset);
                    111:     (void)fpu_upd_fpsr(fe, &fe->fe_f3);
                    112:     fpu_implode(fe, &fe->fe_f3, FTYPE_EXT, &fpreg[dstreg * 3]);
                    113: #if DEBUG_FPE
                    114:     printf("  fpu_emul_fmovecr: result %08x,%08x,%08x to FP%d\n",
                    115:           fpreg[dstreg * 3], fpreg[dstreg * 3 + 1], fpreg[dstreg * 3 + 2],
                    116:           dstreg);
                    117: #endif
                    118:     return 0;
                    119: }