Annotation of sys/arch/m68k/fpe/fpu_arith.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: fpu_arith.h,v 1.4 2006/01/16 22:08:26 miod Exp $ */
2: /* $NetBSD: fpu_arith.h,v 1.3 2003/08/07 16:28:10 agc Exp $ */
3:
4: /*
5: * Copyright (c) 1992, 1993
6: * The Regents of the University of California. All rights reserved.
7: *
8: * This software was developed by the Computer Systems Engineering group
9: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
10: * contributed to Berkeley.
11: *
12: * All advertising materials mentioning features or use of this software
13: * must display the following acknowledgement:
14: * This product includes software developed by the University of
15: * California, Lawrence Berkeley Laboratory.
16: *
17: * Redistribution and use in source and binary forms, with or without
18: * modification, are permitted provided that the following conditions
19: * are met:
20: * 1. Redistributions of source code must retain the above copyright
21: * notice, this list of conditions and the following disclaimer.
22: * 2. Redistributions in binary form must reproduce the above copyright
23: * notice, this list of conditions and the following disclaimer in the
24: * documentation and/or other materials provided with the distribution.
25: * 3. Neither the name of the University nor the names of its contributors
26: * may be used to endorse or promote products derived from this software
27: * without specific prior written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
33: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
35: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
37: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
38: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39: * SUCH DAMAGE.
40: *
41: * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93
42: */
43:
44: /*
45: * Extended-precision arithmetic.
46: *
47: * We hold the notion of a `carry register', which may or may not be a
48: * machine carry bit or register. On the SPARC, it is just the machine's
49: * carry bit.
50: *
51: * In the worst case, you can compute the carry from x+y as
52: * (unsigned)(x + y) < (unsigned)x
53: * and from x+y+c as
54: * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0)
55: * for example.
56: */
57:
58: #ifndef FPE_USE_ASM
59:
60: /* set up for extended-precision arithemtic */
61: #define FPU_DECL_CARRY quad_t fpu_carry, fpu_tmp;
62:
63: /*
64: * We have three kinds of add:
65: * add with carry: r = x + y + c
66: * add (ignoring current carry) and set carry: c'r = x + y + 0
67: * add with carry and set carry: c'r = x + y + c
68: * The macros use `C' for `use carry' and `S' for `set carry'.
69: * Note that the state of the carry is undefined after ADDC and SUBC,
70: * so if all you have for these is `add with carry and set carry',
71: * that is OK.
72: *
73: * The same goes for subtract, except that we compute x - y - c.
74: *
75: * Finally, we have a way to get the carry into a `regular' variable,
76: * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero
77: * into carry; GET_CARRY sets its argument to 0 or 1.
78: */
79: #define FPU_ADDC(r, x, y) \
80: (r) = (x) + (y) + (!!fpu_carry)
81: #define FPU_ADDS(r, x, y) \
82: { \
83: fpu_tmp = (quad_t)(x) + (quad_t)(y); \
84: (r) = (u_int)fpu_tmp; \
85: fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
86: }
87: #define FPU_ADDCS(r, x, y) \
88: { \
89: fpu_tmp = (quad_t)(x) + (quad_t)(y) + (!!fpu_carry); \
90: (r) = (u_int)fpu_tmp; \
91: fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
92: }
93: #define FPU_SUBC(r, x, y) \
94: (r) = (x) - (y) - (!!fpu_carry)
95: #define FPU_SUBS(r, x, y) \
96: { \
97: fpu_tmp = (quad_t)(x) - (quad_t)(y); \
98: (r) = (u_int)fpu_tmp; \
99: fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
100: }
101: #define FPU_SUBCS(r, x, y) \
102: { \
103: fpu_tmp = (quad_t)(x) - (quad_t)(y) - (!!fpu_carry); \
104: (r) = (u_int)fpu_tmp; \
105: fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
106: }
107:
108: #define FPU_GET_CARRY(r) (r) = (!!fpu_carry)
109: #define FPU_SET_CARRY(v) fpu_carry = ((v) != 0)
110:
111: #else
112:
113: /* set up for extended-precision arithemtic */
114: #define FPU_DECL_CARRY int fpu_tmp;
115:
116: /*
117: * We have three kinds of add:
118: * add with carry: r = x + y + c
119: * add (ignoring current carry) and set carry: c'r = x + y + 0
120: * add with carry and set carry: c'r = x + y + c
121: * The macros use `C' for `use carry' and `S' for `set carry'.
122: * Note that the state of the carry is undefined after ADDC and SUBC,
123: * so if all you have for these is `add with carry and set carry',
124: * that is OK.
125: *
126: * The same goes for subtract, except that we compute x - y - c.
127: *
128: * Finally, we have a way to get the carry into a `regular' variable,
129: * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero
130: * into carry; GET_CARRY sets its argument to 0 or 1.
131: */
132: #define FPU_ADDC(r, x, y) \
133: { \
134: asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \
135: asm volatile("addxl %1,%0" : "=d"(fpu_tmp) : "d"(y)); \
136: asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \
137: }
138: #define FPU_ADDS(r, x, y) \
139: { \
140: asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \
141: asm volatile("addl %1,%0" : "=d"(fpu_tmp) : "g"(y)); \
142: asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \
143: }
144: #define FPU_ADDCS(r, x, y) FPU_ADDC(r, x, y)
145:
146: #define FPU_SUBC(r, x, y) \
147: { \
148: asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \
149: asm volatile("subxl %1,%0" : "=d"(fpu_tmp) : "d"(y)); \
150: asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \
151: }
152: #define FPU_SUBS(r, x, y) \
153: { \
154: asm volatile("movel %1,%0" : "=d"(fpu_tmp) : "g"(x)); \
155: asm volatile("subl %1,%0" : "=d"(fpu_tmp) : "g"(y)); \
156: asm volatile("movel %1,%0" : "=g"(r) : "r"(fpu_tmp)); \
157: }
158: #define FPU_SUBCS(r, x, y) FPU_SUBC(r, x, y)
159:
160: #define FPU_GET_CARRY(r) \
161: { \
162: asm volatile("moveq #0,%0" : "=d"(r)); \
163: asm volatile("addxl %0,%0" : "+d"(r)); \
164: }
165: #define FPU_SET_CARRY(v) \
166: { \
167: asm volatile("moveq #0,%0" : "=d"(fpu_tmp)); \
168: asm volatile("subl %1,%0" : "=d"(fpu_tmp) : "g"(v)); \
169: }
170:
171: #endif /* FPE_USE_ASM */
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