Annotation of sys/arch/m68k/060sp/fnetbsd.S, Revision 1.1.1.1
1.1 nbrk 1: #
2: # $OpenBSD: fnetbsd.S,v 1.2 1996/05/30 22:14:05 niklas Exp $
3: # $NetBSD: fnetbsd.S,v 1.2 1996/05/15 21:16:45 is Exp $
4: #
5: #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
6: # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
7: # M68000 Hi-Performance Microprocessor Division
8: # M68060 Software Package Production Release
9: #
10: # M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc.
11: # All rights reserved.
12: #
13: # THE SOFTWARE is provided on an "AS IS" basis and without warranty.
14: # To the maximum extent permitted by applicable law,
15: # MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
16: # INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
17: # FOR A PARTICULAR PURPOSE and any warranty against infringement with
18: # regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
19: # and any accompanying written materials.
20: #
21: # To the maximum extent permitted by applicable law,
22: # IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
23: # (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
24: # BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
25: # ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
26: #
27: # Motorola assumes no responsibility for the maintenance and support
28: # of the SOFTWARE.
29: #
30: # You are hereby granted a copyright license to use, modify, and distribute the
31: # SOFTWARE so long as this entire notice is retained without alteration
32: # in any modified and/or redistributed versions, and that such modified
33: # versions are clearly identified as such.
34: # No licenses are granted by implication, estoppel or otherwise under any
35: # patents or trademarks of Motorola, Inc.
36: #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
37: #
38: # Derived from:
39: # fskeleton.s
40: #
41: # This file contains:
42: # (1) example "Call-out"s
43: # (2) example package entry code
44: # (3) example "Call-out" table
45: #
46:
47:
48: #################################
49: # (1) EXAMPLE CALL-OUTS #
50: # #
51: # _060_fpsp_done() #
52: # _060_real_ovfl() #
53: # _060_real_unfl() #
54: # _060_real_operr() #
55: # _060_real_snan() #
56: # _060_real_dz() #
57: # _060_real_inex() #
58: # _060_real_bsun() #
59: # _060_real_fline() #
60: # _060_real_fpu_disabled() #
61: # _060_real_trap() #
62: #################################
63:
64: #
65: # _060_fpsp_done():
66: #
67: # This is the main exit point for the 68060 Floating-Point
68: # Software Package. For a normal exit, all 060FPSP routines call this
69: # routine. The operating system can do system dependent clean-up or
70: # simply execute an "rte" as with the sample code below.
71: #
72: .global _060_fpsp_done
73: _060_fpsp_done:
74: rte
75:
76: #
77: # _060_real_ovfl():
78: #
79: # This is the exit point for the 060FPSP when an enabled overflow exception
80: # is present. The routine below should point to the operating system handler
81: # for enabled overflow conditions. The exception stack frame is an overflow
82: # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
83: #
84: # The sample routine below simply clears the exception status bit and
85: # does an "rte".
86: #
87: .global _060_real_ovfl
88: _060_real_ovfl:
89: fsave sp@-
90: movew #0x6000,sp@(0x2)
91: frestore sp@+
92: jmp _fpfault
93:
94: #
95: # _060_real_unfl():
96: #
97: # This is the exit point for the 060FPSP when an enabled underflow exception
98: # is present. The routine below should point to the operating system handler
99: # for enabled underflow conditions. The exception stack frame is an underflow
100: # stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
101: #
102: # The sample routine below simply clears the exception status bit and
103: # does an "rte".
104: #
105: .global _060_real_unfl
106: _060_real_unfl:
107: fsave sp@-
108: movew #0x6000,sp@(0x2)
109: frestore sp@+
110: jmp _fpfault
111:
112: #
113: # _060_real_operr():
114: #
115: # This is the exit point for the 060FPSP when an enabled operand error exception
116: # is present. The routine below should point to the operating system handler
117: # for enabled operand error exceptions. The exception stack frame is an operand error
118: # stack frame. The FP state frame holds the source operand of the faulting
119: # instruction.
120: #
121: # The sample routine below simply clears the exception status bit and
122: # does an "rte".
123: #
124: .global _060_real_operr
125: _060_real_operr:
126: fsave sp@-
127: movew #0x6000,sp@(0x2)
128: frestore sp@+
129: jmp _fpfault
130:
131: #
132: # _060_real_snan():
133: #
134: # This is the exit point for the 060FPSP when an enabled signalling NaN exception
135: # is present. The routine below should point to the operating system handler
136: # for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
137: # stack frame. The FP state frame holds the source operand of the faulting
138: # instruction.
139: #
140: # The sample routine below simply clears the exception status bit and
141: # does an "rte".
142: #
143: .global _060_real_snan
144: _060_real_snan:
145: fsave sp@-
146: movew #0x6000,sp@(0x2)
147: frestore sp@+
148: jmp _fpfault
149:
150: #
151: # _060_real_dz():
152: #
153: # This is the exit point for the 060FPSP when an enabled divide-by-zero exception
154: # is present. The routine below should point to the operating system handler
155: # for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
156: # stack frame. The FP state frame holds the source operand of the faulting
157: # instruction.
158: #
159: # The sample routine below simply clears the exception status bit and
160: # does an "rte".
161: #
162: .global _060_real_dz
163: _060_real_dz:
164: fsave sp@-
165: movew #0x6000,sp@(0x2)
166: frestore sp@+
167: jmp _fpfault
168:
169: #
170: # _060_real_inex():
171: #
172: # This is the exit point for the 060FPSP when an enabled inexact exception
173: # is present. The routine below should point to the operating system handler
174: # for enabled inexact exceptions. The exception stack frame is an inexact
175: # stack frame. The FP state frame holds the source operand of the faulting
176: # instruction.
177: #
178: # The sample routine below simply clears the exception status bit and
179: # does an "rte".
180: #
181: .global _060_real_inex
182: _060_real_inex:
183: fsave sp@-
184: movew #0x6000,sp@(0x2)
185: frestore sp@+
186: jmp _fpfault
187:
188: #
189: # _060_real_bsun():
190: #
191: # This is the exit point for the 060FPSP when an enabled bsun exception
192: # is present. The routine below should point to the operating system handler
193: # for enabled bsun exceptions. The exception stack frame is a bsun
194: # stack frame.
195: #
196: # The sample routine below clears the exception status bit, clears the NaN
197: # bit in the FPSR, and does an "rte". The instruction that caused the
198: # bsun will now be re-executed but with the NaN FPSR bit cleared.
199: #
200: .global _060_real_bsun
201: _060_real_bsun:
202: fsave sp@-
203:
204: fmovel fpsr,sp@-
205: andib #0xfe,sp@
206: fmovel sp@+,fpsr
207:
208: addl #0xc,sp
209: jmp _fpfault
210:
211: #
212: # _060_real_fline():
213: #
214: # This is the exit point for the 060FPSP when an F-Line Illegal exception is
215: # encountered. Three different types of exceptions can enter the F-Line exception
216: # vector number 11: FP Unimplemented Instructions, FP implemented instructions when
217: # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
218: # _fpsp_fline() distinguishes between the three and acts appropriately. F-Line
219: # Illegals branch here.
220: #
221: .global _060_real_fline
222: _060_real_fline:
223: jmp _fpfault
224:
225: #
226: # _060_real_fpu_disabled():
227: #
228: # This is the exit point for the 060FPSP when an FPU disabled exception is
229: # encountered. Three different types of exceptions can enter the F-Line exception
230: # vector number 11: FP Unimplemented Instructions, FP implemented instructions when
231: # the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
232: # _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled
233: # exceptions branch here.
234: #
235: # The sample code below enables the FPU, sets the PC field in the exception stack
236: # frame to the PC of the instruction causing the exception, and does an "rte".
237: # The execution of the instruction then proceeds with an enabled floating-point
238: # unit.
239: #
240: .global _060_real_fpu_disabled
241: _060_real_fpu_disabled:
242: movel d0,sp@- |# enabled the fpu
243:
244: .short 0x4e7a,0x0808 |* movec.l pcr,d0
245: bclr #0x1,d0
246: .short 0x4e7b,0x0808 |* movec.l d0,pcr
247: movel sp@+,d0
248:
249: movel sp@(0xc),sp@(0x2) |# set "Current PC"
250: rte
251:
252: #
253: # _060_real_trap():
254: #
255: # This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction
256: # discovers that the trap condition is true and it should branch to the operating
257: # system handler for the trap exception vector number 7.
258: #
259: # The sample code below simply executes an "rte".
260: #
261: .global _060_real_trap
262: _060_real_trap:
263: rte
264:
265: #############################################################################
266:
267: ##################################
268: # (2) EXAMPLE PACKAGE ENTRY CODE #
269: ##################################
270:
271: .global _060_fpsp_snan
272: _060_fpsp_snan:
273: bral _FP_CALL_TOP+0x80+0x00
274:
275: .global _060_fpsp_operr
276: _060_fpsp_operr:
277: bral _FP_CALL_TOP+0x80+0x08
278:
279: .global _060_fpsp_ovfl
280: _060_fpsp_ovfl:
281: bral _FP_CALL_TOP+0x80+0x10
282:
283: .global _060_fpsp_unfl
284: _060_fpsp_unfl:
285: bral _FP_CALL_TOP+0x80+0x18
286:
287: .global _060_fpsp_dz
288: _060_fpsp_dz:
289: bral _FP_CALL_TOP+0x80+0x20
290:
291: .global _060_fpsp_inex
292: _060_fpsp_inex:
293: bral _FP_CALL_TOP+0x80+0x28
294:
295: .global _060_fpsp_fline
296: _060_fpsp_fline:
297: bral _FP_CALL_TOP+0x80+0x30
298:
299: .global _060_fpsp_unsupp
300: _060_fpsp_unsupp:
301: bral _FP_CALL_TOP+0x80+0x38
302:
303: .global _060_fpsp_effadd
304: _060_fpsp_effadd:
305: bral _FP_CALL_TOP+0x80+0x40
306:
307: #############################################################################
308:
309: ################################
310: # (3) EXAMPLE CALL-OUT SECTION #
311: ################################
312:
313: # The size of this section MUST be 128 bytes!!!
314:
315: .global _FP_CALL_TOP
316: _FP_CALL_TOP:
317: .long _060_real_bsun-_FP_CALL_TOP
318: .long _060_real_snan-_FP_CALL_TOP
319: .long _060_real_operr-_FP_CALL_TOP
320: .long _060_real_ovfl-_FP_CALL_TOP
321: .long _060_real_unfl-_FP_CALL_TOP
322: .long _060_real_dz-_FP_CALL_TOP
323: .long _060_real_inex-_FP_CALL_TOP
324: .long _060_real_fline-_FP_CALL_TOP
325: .long _060_real_fpu_disabled-_FP_CALL_TOP
326: .long _060_real_trap-_FP_CALL_TOP
327: .long _060_real_trace-_FP_CALL_TOP
328: .long _060_real_access-_FP_CALL_TOP
329: .long _060_fpsp_done-_FP_CALL_TOP
330:
331: .long 0x00000000,0x00000000,0x00000000
332:
333: .long _060_imem_read-_FP_CALL_TOP
334: .long _060_dmem_read-_FP_CALL_TOP
335: .long _060_dmem_write-_FP_CALL_TOP
336: .long _060_imem_read_word-_FP_CALL_TOP
337: .long _060_imem_read_long-_FP_CALL_TOP
338: .long _060_dmem_read_byte-_FP_CALL_TOP
339: .long _060_dmem_read_word-_FP_CALL_TOP
340: .long _060_dmem_read_long-_FP_CALL_TOP
341: .long _060_dmem_write_byte-_FP_CALL_TOP
342: .long _060_dmem_write_word-_FP_CALL_TOP
343: .long _060_dmem_write_long-_FP_CALL_TOP
344:
345: .long 0x00000000
346:
347: .long 0x00000000,0x00000000,0x00000000,0x00000000
348:
349: #############################################################################
350:
351: # 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!!
352:
353: .include "fpsp.S"
354:
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