Annotation of sys/arch/m68k/060sp/changes, Revision 1.1.1.1
1.1 nbrk 1: #
2: # $OpenBSD: changes,v 1.2 1996/05/30 22:13:59 niklas Exp $
3: # $NetBSD: changes,v 1.2 1996/05/15 19:47:31 is Exp $
4: #
5:
6: #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7: # MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
8: # M68000 Hi-Performance Microprocessor Division
9: # M68060 Software Package Production Release
10: #
11: # M68060 Software Package Copyright (C) 1993, 1994, 1995, 1996 Motorola Inc.
12: # All rights reserved.
13: #
14: # THE SOFTWARE is provided on an "AS IS" basis and without warranty.
15: # To the maximum extent permitted by applicable law,
16: # MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
17: # INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
18: # FOR A PARTICULAR PURPOSE and any warranty against infringement with
19: # regard to the SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF)
20: # and any accompanying written materials.
21: #
22: # To the maximum extent permitted by applicable law,
23: # IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
24: # (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
25: # BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
26: # ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
27: #
28: # Motorola assumes no responsibility for the maintenance and support
29: # of the SOFTWARE.
30: #
31: # You are hereby granted a copyright license to use, modify, and distribute the
32: # SOFTWARE so long as this entire notice is retained without alteration
33: # in any modified and/or redistributed versions, and that such modified
34: # versions are clearly identified as such.
35: # No licenses are granted by implication, estoppel or otherwise under any
36: # patents or trademarks of Motorola, Inc.
37: #~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
38:
39: CHANGES SINCE LAST RELEASE:
40: ---------------------------
41:
42: 1) "movep" emulation where data was being read from memory
43: was reading the intermediate bytes. Emulation now only
44: reads the required bytes.
45:
46: 2) "flogn", "flog2", and "flog10" of "1" was setting the
47: Inexact FPSR bit. Emulation now does not set Inexact for
48: this case.
49:
50: 3) For an opclass three FP instruction where the effective addressing
51: mode was pre-decrement or post-increment and the address register
52: was A0 or A1, the address register was not being updated as a result
53: of the operation. This has been corrected.
54:
55: 4) Beta 1.2 version had the following erratum:
56:
57: Scenario:
58: ---------
59: If {i,d}mem_{read,write}_{byte,word,long}() returns
60: a failing value to the 68060SP, the package ignores
61: this return value and continues with program execution
62: as if it never received a failing value.
63:
64: Effect:
65: -------
66: For example, if a user executed "fsin.x ADDR,fp0" where
67: ADDR should cause a "segmentation violation", the memory read
68: requested by the package should return a failing value
69: to the package. Since the package currently ignores this
70: return value, the user program will continue to the
71: next instruction, and the result created in fp0 will be
72: undefined.
73:
74: Fix:
75: ----
76: This has been fixed in the current release.
77:
78: Notes:
79: ------
80: Upon receiving a non-zero (failing) return value from
81: a {i,d}mem_{read,write}_{byte,word,long}() "call-out",
82: the package creates a 16-byte access error stack frame
83: from the current exception stack frame and exits
84: through the "call-out" _real_access(). This is the process
85: as described in the MC68060 User's Manual.
86:
87: For instruction read access errors, the info stacked is:
88: SR = SR at time of exception
89: PC = PC of instruction being emulated
90: VOFF = $4008 (stack frame format type)
91: ADDRESS = PC of instruction being emulated
92: FSLW = FAULT STATUS LONGWORD
93:
94: The valid FSLW bits are:
95: bit 27 = 1 (misaligned bit)
96: bit 24 = 1 (read)
97: bit 23 = 0 (write)
98: bit 22:21 = 10 (SIZE = word)
99: bit 20:19 = 00 (TT)
100: bit 18:16 = x10 (TM; x = 1 for supervisor mode)
101: bit 15 = 1 (IO)
102: bit 0 = 1 (Software Emulation Error)
103:
104: all other bits are EQUAL TO ZERO and can be set by the _real_access()
105: "call-out" stub by the user as appropriate. The MC68060 User's Manual
106: stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
107: other bits.
108:
109: For data read/write access errors, the info stacked is:
110: SR = SR at time of exception
111: PC = PC of instruction being emulated
112: VOFF = $4008 (stack frame format type)
113: ADDRESS = Address of source or destination operand
114: FSLW = FAULT STATUS LONGWORD
115:
116: The valid FSLW bits are:
117: bit 27 = 0 (misaligned bit)
118: bit 24 = x (read; 1 if read, 0 if write)
119: bit 23 = x (write; 1 if write, 0 if read)
120: bit 22:21 = xx (SIZE; see MC68060 User's Manual)
121: bit 20:19 = 00 (TT)
122: bit 18:16 = x01 (TM; x = 1 for supervisor mode)
123: bit 15 = 0 (IO)
124: bit 0 = 1 (Software Emulation Error)
125:
126: all other bits are EQUAL TO ZERO and can be set by the _real_access()
127: "call-out" stub by the user as appropriate. The MC68060 User's Manual
128: stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
129: other bits.
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