Annotation of sys/arch/luna88k/dev/timekeeper.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: timekeeper.h,v 1.1 2004/04/21 15:23:56 aoyama Exp $ */
2: /* $NetBSD: timekeeper.h,v 1.1 2000/01/05 08:48:56 nisimura Exp $ */
3:
4: /*-
5: * Copyright (c) 2000 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Tohru Nishimura.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
39:
40: /*
41: * Mostek MK48T02 for LUNA-88K
42: */
43: #define MK_CSR 0 /* control register */
44: #define MK_SEC 1 /* seconds (0..59; BCD) */
45: #define MK_MIN 2 /* minutes (0..59; BCD) */
46: #define MK_HOUR 3 /* hour (0..23; BCD) */
47: #define MK_DOW 4 /* weekday (1..7) */
48: #define MK_DOM 5 /* day in month (1..31; BCD) */
49: #define MK_MONTH 6 /* month (1..12; BCD) */
50: #define MK_YEAR 7 /* year (0..99; BCD) */
51: /* bits in cl_csr */
52: #define MK_CSR_WRITE 0x80 /* want to write */
53: #define MK_CSR_READ 0x40 /* want to read (freeze clock) */
54:
55: /*
56: * Dallas Semiconductor DS1397 for LUNA-88K2
57: */
58: #define DS_SEC 0x0 /* Time of year: seconds (0-59) */
59: #define DS_MIN 0x2 /* Time of year: minutes (0-59) */
60: #define DS_HOUR 0x4 /* Time of year: hour (see above) */
61: #define DS_DOW 0x6 /* Time of year: day of week (1-7) */
62: #define DS_DOM 0x7 /* Time of year: day of month (1-31) */
63: #define DS_MONTH 0x8 /* Time of year: month (1-12) */
64: #define DS_YEAR 0x9 /* Time of year: year in century (0-99) */
65:
66: #define DS_REGA 0xa /* Control register A */
67: #define DS_REGA_RSMASK 0x0f /* Interrupt rate select mask (see below) */
68: #define DS_REGA_DVMASK 0x70 /* Divisor select mask (see below) */
69: #define DS_REGA_UIP 0x80 /* Update in progress; read only. */
70:
71: #define DS_REGB 0xb /* Control register B */
72: #define DS_REGB_DSE 0x01 /* Daylight Savings Enable */
73: #define DS_REGB_24HR 0x02 /* 24-hour mode (AM/PM mode when clear) */
74: #define DS_REGB_BINARY 0x04 /* Binary mode (BCD mode when clear) */
75: #define DS_REGB_SQWE 0x08 /* Square Wave Enable */
76: #define DS_REGB_UIE 0x10 /* Update End interrupt enable */
77: #define DS_REGB_AIE 0x20 /* Alarm interrupt enable */
78: #define DS_REGB_PIE 0x40 /* Periodic interrupt enable */
79: #define DS_REGB_SET 0x80 /* Allow time to be set; stops updates */
80:
81: #define DS_REGC 0xc /* Control register C */
82: /* DS_REGC_UNUSED 0x0f UNUSED */
83: #define DS_REGC_UF 0x10 /* Update End interrupt flag */
84: #define DS_REGC_AF 0x20 /* Alarm interrupt flag */
85: #define DS_REGC_PF 0x40 /* Periodic interrupt flag */
86: #define DS_REGC_IRQF 0x80 /* Interrupt request pending flag */
87:
88: #define DS_REGD 0xd /* Control register D */
89: /* DS_REGD_UNUSED 0x7f UNUSED */
90: #define DS_REGD_VRT 0x80 /* Valid RAM and Time bit */
91:
92: #define DS_NREGS 0xe /* 14 registers; CMOS follows */
93: #define DS_NTODREGS 0xa /* 10 of those regs are for TOD and alarm */
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