Annotation of sys/arch/landisk/include/bus.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: bus.h,v 1.4 2007/04/12 12:00:02 miod Exp $ */
2: /* $NetBSD: bus.h,v 1.1 2006/09/01 21:26:18 uwe Exp $ */
3:
4: /*-
5: * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10: * NASA Ames Research Center.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: /*
42: * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
43: * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
44: *
45: * Redistribution and use in source and binary forms, with or without
46: * modification, are permitted provided that the following conditions
47: * are met:
48: * 1. Redistributions of source code must retain the above copyright
49: * notice, this list of conditions and the following disclaimer.
50: * 2. Redistributions in binary form must reproduce the above copyright
51: * notice, this list of conditions and the following disclaimer in the
52: * documentation and/or other materials provided with the distribution.
53: * 3. All advertising materials mentioning features or use of this software
54: * must display the following acknowledgement:
55: * This product includes software developed by Christopher G. Demetriou
56: * for the NetBSD Project.
57: * 4. The name of the author may not be used to endorse or promote products
58: * derived from this software without specific prior written permission
59: *
60: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
61: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
62: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
63: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
64: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
65: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
66: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
67: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
68: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
69: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
70: */
71:
72: #ifndef _LANDISK_BUS_H_
73: #define _LANDISK_BUS_H_
74:
75: #include <sys/types.h>
76:
77: typedef u_long bus_addr_t;
78: typedef u_long bus_size_t;
79:
80: typedef struct _bus_space *bus_space_tag_t;
81: typedef u_long bus_space_handle_t;
82:
83: struct _bus_space {
84: /* cookie */
85: void *bs_cookie;
86:
87: /* mapping/unmapping */
88: int (*bs_map)(void *, bus_addr_t, bus_size_t,
89: int, bus_space_handle_t *);
90: void (*bs_unmap)(void *, bus_space_handle_t,
91: bus_size_t);
92: int (*bs_subregion)(void *, bus_space_handle_t,
93: bus_size_t, bus_size_t, bus_space_handle_t *);
94:
95: /* allocation/deallocation */
96: int (*bs_alloc)(void *, bus_addr_t, bus_addr_t,
97: bus_size_t, bus_size_t, bus_size_t, int,
98: bus_addr_t *, bus_space_handle_t *);
99: void (*bs_free)(void *, bus_space_handle_t,
100: bus_size_t);
101:
102: /* get kernel virtual address */
103: void * (*bs_vaddr)(void *, bus_space_handle_t);
104:
105: /* read (single) */
106: uint8_t (*bs_r_1)(void *, bus_space_handle_t,
107: bus_size_t);
108: uint16_t (*bs_r_2)(void *, bus_space_handle_t,
109: bus_size_t);
110: uint32_t (*bs_r_4)(void *, bus_space_handle_t,
111: bus_size_t);
112: uint64_t (*bs_r_8)(void *, bus_space_handle_t,
113: bus_size_t);
114:
115: /* read multiple */
116: void (*bs_rm_1)(void *, bus_space_handle_t,
117: bus_size_t, uint8_t *, bus_size_t);
118: void (*bs_rm_2)(void *, bus_space_handle_t,
119: bus_size_t, uint16_t *, bus_size_t);
120: void (*bs_rm_4)(void *, bus_space_handle_t,
121: bus_size_t, uint32_t *, bus_size_t);
122: void (*bs_rm_8)(void *, bus_space_handle_t,
123: bus_size_t, uint64_t *, bus_size_t);
124:
125: void (*bs_rrm_2)(void *, bus_space_handle_t,
126: bus_size_t, uint8_t *, bus_size_t);
127: void (*bs_rrm_4)(void *, bus_space_handle_t,
128: bus_size_t, uint8_t *, bus_size_t);
129: void (*bs_rrm_8)(void *, bus_space_handle_t,
130: bus_size_t, uint8_t *, bus_size_t);
131:
132: /* read region */
133: void (*bs_rr_1)(void *, bus_space_handle_t,
134: bus_size_t, uint8_t *, bus_size_t);
135: void (*bs_rr_2)(void *, bus_space_handle_t,
136: bus_size_t, uint16_t *, bus_size_t);
137: void (*bs_rr_4)(void *, bus_space_handle_t,
138: bus_size_t, uint32_t *, bus_size_t);
139: void (*bs_rr_8)(void *, bus_space_handle_t,
140: bus_size_t, uint64_t *, bus_size_t);
141:
142: void (*bs_rrr_2)(void *, bus_space_handle_t,
143: bus_size_t, uint8_t *, bus_size_t);
144: void (*bs_rrr_4)(void *, bus_space_handle_t,
145: bus_size_t, uint8_t *, bus_size_t);
146: void (*bs_rrr_8)(void *, bus_space_handle_t,
147: bus_size_t, uint8_t *, bus_size_t);
148:
149: /* write (single) */
150: void (*bs_w_1)(void *, bus_space_handle_t,
151: bus_size_t, uint8_t);
152: void (*bs_w_2)(void *, bus_space_handle_t,
153: bus_size_t, uint16_t);
154: void (*bs_w_4)(void *, bus_space_handle_t,
155: bus_size_t, uint32_t);
156: void (*bs_w_8)(void *, bus_space_handle_t,
157: bus_size_t, uint64_t);
158:
159: /* write multiple */
160: void (*bs_wm_1)(void *, bus_space_handle_t,
161: bus_size_t, const uint8_t *, bus_size_t);
162: void (*bs_wm_2)(void *, bus_space_handle_t,
163: bus_size_t, const uint16_t *, bus_size_t);
164: void (*bs_wm_4)(void *, bus_space_handle_t,
165: bus_size_t, const uint32_t *, bus_size_t);
166: void (*bs_wm_8)(void *, bus_space_handle_t,
167: bus_size_t, const uint64_t *, bus_size_t);
168:
169: void (*bs_wrm_2)(void *, bus_space_handle_t,
170: bus_size_t, const uint8_t *, bus_size_t);
171: void (*bs_wrm_4)(void *, bus_space_handle_t,
172: bus_size_t, const uint8_t *, bus_size_t);
173: void (*bs_wrm_8)(void *, bus_space_handle_t,
174: bus_size_t, const uint8_t *, bus_size_t);
175:
176: /* write region */
177: void (*bs_wr_1)(void *, bus_space_handle_t,
178: bus_size_t, const uint8_t *, bus_size_t);
179: void (*bs_wr_2)(void *, bus_space_handle_t,
180: bus_size_t, const uint16_t *, bus_size_t);
181: void (*bs_wr_4)(void *, bus_space_handle_t,
182: bus_size_t, const uint32_t *, bus_size_t);
183: void (*bs_wr_8)(void *, bus_space_handle_t,
184: bus_size_t, const uint64_t *, bus_size_t);
185:
186: void (*bs_wrr_2)(void *, bus_space_handle_t,
187: bus_size_t, const uint8_t *, bus_size_t);
188: void (*bs_wrr_4)(void *, bus_space_handle_t,
189: bus_size_t, const uint8_t *, bus_size_t);
190: void (*bs_wrr_8)(void *, bus_space_handle_t,
191: bus_size_t, const uint8_t *, bus_size_t);
192:
193: /* set multiple */
194: void (*bs_sm_1)(void *, bus_space_handle_t,
195: bus_size_t, uint8_t, bus_size_t);
196: void (*bs_sm_2)(void *, bus_space_handle_t,
197: bus_size_t, uint16_t, bus_size_t);
198: void (*bs_sm_4)(void *, bus_space_handle_t,
199: bus_size_t, uint32_t, bus_size_t);
200: void (*bs_sm_8)(void *, bus_space_handle_t,
201: bus_size_t, uint64_t, bus_size_t);
202:
203: /* set region */
204: void (*bs_sr_1)(void *, bus_space_handle_t,
205: bus_size_t, uint8_t, bus_size_t);
206: void (*bs_sr_2)(void *, bus_space_handle_t,
207: bus_size_t, uint16_t, bus_size_t);
208: void (*bs_sr_4)(void *, bus_space_handle_t,
209: bus_size_t, uint32_t, bus_size_t);
210: void (*bs_sr_8)(void *, bus_space_handle_t,
211: bus_size_t, uint64_t, bus_size_t);
212:
213: /* copy */
214: void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t,
215: bus_space_handle_t, bus_size_t, bus_size_t);
216: void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t,
217: bus_space_handle_t, bus_size_t, bus_size_t);
218: void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t,
219: bus_space_handle_t, bus_size_t, bus_size_t);
220: void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t,
221: bus_space_handle_t, bus_size_t, bus_size_t);
222: };
223:
224: #ifdef _KERNEL
225: /*
226: * Utility macros; INTERNAL USE ONLY.
227: */
228: #define __bs_c(a,b) __CONCAT(a,b)
229: #define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size)
230:
231: #define __bs_rs(sz, tn, t, h, o) \
232: (*(t)->__bs_opname(r,sz))((t)->bs_cookie, h, o)
233:
234: #define __bs_ws(sz, tn, t, h, o, v) \
235: (*(t)->__bs_opname(w,sz))((t)->bs_cookie, h, o, v)
236:
237: #define __bs_nonsingle(type, sz, tn, t, h, o, a, c) \
238: (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c)
239:
240: #define __bs_set(type, sz, tn, t, h, o, v, c) \
241: (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c)
242:
243: #define __bs_copy(sz, tn, t, h1, o1, h2, o2, cnt) \
244: (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt)
245:
246:
247: /*
248: * Mapping and unmapping operations.
249: */
250: #define bus_space_map(t, a, s, f, hp) \
251: (*(t)->bs_map)((t)->bs_cookie, (a), (s), (f), (hp))
252: #define bus_space_unmap(t, h, s) \
253: (*(t)->bs_unmap)((t)->bs_cookie, (h), (s))
254: #define bus_space_subregion(t, h, o, s, hp) \
255: (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp))
256:
257: #endif /* _KERNEL */
258:
259: #define BUS_SPACE_MAP_CACHEABLE 0x01
260: #define BUS_SPACE_MAP_LINEAR 0x02
261: #define BUS_SPACE_MAP_PREFETCHABLE 0x04
262:
263: #ifdef _KERNEL
264: /*
265: * Allocation and deallocation operations.
266: */
267: #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
268: (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
269: (f), (ap), (hp))
270: #define bus_space_free(t, h, s) \
271: (*(t)->bs_free)((t)->bs_cookie, (h), (s))
272:
273: /*
274: * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
275: */
276: #define bus_space_vaddr(t, h) \
277: (*(t)->bs_vaddr)((t)->bs_cookie, (h))
278:
279: /*
280: * Bus barrier operations. The SH3 does not currently require
281: * barriers, but we must provide the flags to MI code.
282: */
283: #define bus_space_barrier(t, h, o, l, f) \
284: ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
285:
286: #define BUS_SPACE_BARRIER_READ 0x01
287: #define BUS_SPACE_BARRIER_WRITE 0x02
288:
289:
290: /*
291: * Bus read (single) operations.
292: */
293: #define bus_space_read_1(t, h, o) __bs_rs(1,uint8_t,(t),(h),(o))
294: #define bus_space_read_2(t, h, o) __bs_rs(2,uint16_t,(t),(h),(o))
295: #define bus_space_read_4(t, h, o) __bs_rs(4,uint32_t,(t),(h),(o))
296: #define bus_space_read_8(t, h, o) __bs_rs(8,uint64_t,(t),(h),(o))
297:
298:
299: /*
300: * Bus read multiple operations.
301: */
302: #define bus_space_read_multi_1(t, h, o, a, c) \
303: __bs_nonsingle(rm,1,uint8_t,(t),(h),(o),(a),(c))
304: #define bus_space_read_multi_2(t, h, o, a, c) \
305: __bs_nonsingle(rm,2,uint16_t,(t),(h),(o),(a),(c))
306: #define bus_space_read_multi_4(t, h, o, a, c) \
307: __bs_nonsingle(rm,4,uint32_t,(t),(h),(o),(a),(c))
308: #define bus_space_read_multi_8(t, h, o, a, c) \
309: __bs_nonsingle(rm,8,uint64_t,(t),(h),(o),(a),(c))
310:
311: #define bus_space_read_raw_multi_2(t, h, o, a, c) \
312: __bs_nonsingle(rrm,2,uint16_t,(t),(h),(o),(a),(c))
313: #define bus_space_read_raw_multi_4(t, h, o, a, c) \
314: __bs_nonsingle(rrm,4,uint32_t,(t),(h),(o),(a),(c))
315: #define bus_space_read_raw_multi_8(t, h, o, a, c) \
316: __bs_nonsingle(rrm,8,uint64_t,(t),(h),(o),(a),(c))
317:
318:
319: /*
320: * Bus read region operations.
321: */
322: #define bus_space_read_region_1(t, h, o, a, c) \
323: __bs_nonsingle(rr,1,uint8_t,(t),(h),(o),(a),(c))
324: #define bus_space_read_region_2(t, h, o, a, c) \
325: __bs_nonsingle(rr,2,uint16_t,(t),(h),(o),(a),(c))
326: #define bus_space_read_region_4(t, h, o, a, c) \
327: __bs_nonsingle(rr,4,uint32_t,(t),(h),(o),(a),(c))
328: #define bus_space_read_region_8(t, h, o, a, c) \
329: __bs_nonsingle(rr,8,uint64_t,(t),(h),(o),(a),(c))
330:
331: #define bus_space_read_raw_region_2(t, h, o, a, c) \
332: __bs_nonsingle(rrr,2,uint16_t,(t),(h),(o),(a),(c))
333: #define bus_space_read_raw_region_4(t, h, o, a, c) \
334: __bs_nonsingle(rrr,4,uint32_t,(t),(h),(o),(a),(c))
335: #define bus_space_read_raw_region_8(t, h, o, a, c) \
336: __bs_nonsingle(rrr,8,uint64_t,(t),(h),(o),(a),(c))
337:
338:
339: /*
340: * Bus write (single) operations.
341: */
342: #define bus_space_write_1(t, h, o, v) __bs_ws(1,uint8_t,(t),(h),(o),(v))
343: #define bus_space_write_2(t, h, o, v) __bs_ws(2,uint16_t,(t),(h),(o),(v))
344: #define bus_space_write_4(t, h, o, v) __bs_ws(4,uint32_t,(t),(h),(o),(v))
345: #define bus_space_write_8(t, h, o, v) __bs_ws(8,uint64_t,(t),(h),(o),(v))
346:
347:
348: /*
349: * Bus write multiple operations.
350: */
351: #define bus_space_write_multi_1(t, h, o, a, c) \
352: __bs_nonsingle(wm,1,uint8_t,(t),(h),(o),(a),(c))
353: #define bus_space_write_multi_2(t, h, o, a, c) \
354: __bs_nonsingle(wm,2,uint16_t,(t),(h),(o),(a),(c))
355: #define bus_space_write_multi_4(t, h, o, a, c) \
356: __bs_nonsingle(wm,4,uint32_t,(t),(h),(o),(a),(c))
357: #define bus_space_write_multi_8(t, h, o, a, c) \
358: __bs_nonsingle(wm,8,uint64_t,(t),(h),(o),(a),(c))
359:
360: #define bus_space_write_raw_multi_2(t, h, o, a, c) \
361: __bs_nonsingle(wrm,2,uint16_t,(t),(h),(o),(a),(c))
362: #define bus_space_write_raw_multi_4(t, h, o, a, c) \
363: __bs_nonsingle(wrm,4,uint32_t,(t),(h),(o),(a),(c))
364: #define bus_space_write_raw_multi_8(t, h, o, a, c) \
365: __bs_nonsingle(wrm,8,uint64_t,(t),(h),(o),(a),(c))
366:
367:
368: /*
369: * Bus write region operations.
370: */
371: #define bus_space_write_region_1(t, h, o, a, c) \
372: __bs_nonsingle(wr,1,uint8_t,(t),(h),(o),(a),(c))
373: #define bus_space_write_region_2(t, h, o, a, c) \
374: __bs_nonsingle(wr,2,uint16_t,(t),(h),(o),(a),(c))
375: #define bus_space_write_region_4(t, h, o, a, c) \
376: __bs_nonsingle(wr,4,uint32_t,(t),(h),(o),(a),(c))
377: #define bus_space_write_region_8(t, h, o, a, c) \
378: __bs_nonsingle(wr,8,uint64_t,(t),(h),(o),(a),(c))
379:
380: #define bus_space_write_raw_region_2(t, h, o, a, c) \
381: __bs_nonsingle(wrr,2,uint16_t,(t),(h),(o),(a),(c))
382: #define bus_space_write_raw_region_4(t, h, o, a, c) \
383: __bs_nonsingle(wrr,4,uint32_t,(t),(h),(o),(a),(c))
384: #define bus_space_write_raw_region_8(t, h, o, a, c) \
385: __bs_nonsingle(wrr,8,uint64_t,(t),(h),(o),(a),(c))
386:
387:
388: /*
389: * Set multiple operations.
390: */
391: #define bus_space_set_multi_1(t, h, o, v, c) \
392: __bs_set(sm,1,uint8_t,(t),(h),(o),(v),(c))
393: #define bus_space_set_multi_2(t, h, o, v, c) \
394: __bs_set(sm,2,uint16_t,(t),(h),(o),(v),(c))
395: #define bus_space_set_multi_4(t, h, o, v, c) \
396: __bs_set(sm,4,uint32_t,(t),(h),(o),(v),(c))
397: #define bus_space_set_multi_8(t, h, o, v, c) \
398: __bs_set(sm,8,uint64_t,(t),(h),(o),(v),(c))
399:
400:
401: /*
402: * Set region operations.
403: */
404: #define bus_space_set_region_1(t, h, o, v, c) \
405: __bs_set(sr,1,uint8_t,(t),(h),(o),(v),(c))
406: #define bus_space_set_region_2(t, h, o, v, c) \
407: __bs_set(sr,2,uint16_t,(t),(h),(o),(v),(c))
408: #define bus_space_set_region_4(t, h, o, v, c) \
409: __bs_set(sr,4,uint32_t,(t),(h),(o),(v),(c))
410: #define bus_space_set_region_8(t, h, o, v, c) \
411: __bs_set(sr,8,uint64_t,(t),(h),(o),(v),(c))
412:
413:
414: /*
415: * Copy region operations.
416: */
417: #define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \
418: __bs_copy(1, uint8_t, (t), (h1), (o1), (h2), (o2), (c))
419: #define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \
420: __bs_copy(2, uint16_t, (t), (h1), (o1), (h2), (o2), (c))
421: #define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \
422: __bs_copy(4, uint32_t, (t), (h1), (o1), (h2), (o2), (c))
423: #define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \
424: __bs_copy(8, uint64_t, (t), (h1), (o1), (h2), (o2), (c))
425:
426: #endif /* _KERNEL */
427:
428: /*
429: * Flags used in various bus DMA methods.
430: */
431: #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
432: #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
433: #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
434: #define BUS_DMA_COHERENT 0x004 /* map memory to not require sync */
435: #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
436: #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
437: #define BUS_DMA_BUS2 0x020
438: #define BUS_DMA_BUS3 0x040
439: #define BUS_DMA_BUS4 0x080
440: #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
441: #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
442: #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
443:
444: /* Forwards needed by prototypes below. */
445: struct mbuf;
446: struct uio;
447:
448: /*
449: * Operations performed by bus_dmamap_sync().
450: */
451: #define BUS_DMASYNC_PREREAD 0x01
452: #define BUS_DMASYNC_POSTREAD 0x02
453: #define BUS_DMASYNC_PREWRITE 0x04
454: #define BUS_DMASYNC_POSTWRITE 0x08
455:
456: typedef struct _bus_dma_tag *bus_dma_tag_t;
457: typedef struct _bus_dmamap *bus_dmamap_t;
458:
459: #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
460:
461: /*
462: * bus_dma_segment_t
463: *
464: * Describes a single contiguous DMA transaction. Values
465: * are suitable for programming into DMA registers.
466: */
467: struct _bus_dma_segment {
468: bus_addr_t ds_addr; /* DMA address */
469: bus_size_t ds_len; /* length of transfer */
470:
471: /* private section */
472: bus_addr_t _ds_vaddr; /* virtual address */
473: };
474: typedef struct _bus_dma_segment bus_dma_segment_t;
475:
476: /*
477: * bus_dma_tag_t
478: *
479: * A machine-dependent opaque type describing the implementation of
480: * DMA for a given bus.
481: */
482:
483: struct _bus_dma_tag {
484: void *_cookie; /* cookie used in the guts */
485:
486: /*
487: * DMA mapping methods.
488: */
489: int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
490: bus_size_t, bus_size_t, int, bus_dmamap_t *);
491: void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
492: int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
493: bus_size_t, struct proc *, int);
494: int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
495: struct mbuf *, int);
496: int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
497: struct uio *, int);
498: int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
499: bus_dma_segment_t *, int, bus_size_t, int);
500: void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
501: void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
502: bus_addr_t, bus_size_t, int);
503:
504: /*
505: * DMA memory utility functions.
506: */
507: int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
508: bus_size_t, bus_dma_segment_t *, int, int *, int);
509: void (*_dmamem_free)(bus_dma_tag_t,
510: bus_dma_segment_t *, int);
511: int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
512: int, size_t, caddr_t *, int);
513: void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t);
514: paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
515: int, off_t, int, int);
516: };
517:
518: #define bus_dmamap_create(t, s, n, m, b, f, p) \
519: (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
520: #define bus_dmamap_destroy(t, p) \
521: (*(t)->_dmamap_destroy)((t), (p))
522: #define bus_dmamap_load(t, m, b, s, p, f) \
523: (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
524: #define bus_dmamap_load_mbuf(t, m, b, f) \
525: (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
526: #define bus_dmamap_load_uio(t, m, u, f) \
527: (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
528: #define bus_dmamap_load_raw(t, m, sg, n, s, f) \
529: (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
530: #define bus_dmamap_unload(t, p) \
531: (*(t)->_dmamap_unload)((t), (p))
532: #define bus_dmamap_sync(t, m, o, l, op) \
533: (void)((t)->_dmamap_sync ? \
534: (*(t)->_dmamap_sync)((t), (m), (o), (l), (op)) : (void)0)
535:
536: #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
537: (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
538: #define bus_dmamem_free(t, sg, n) \
539: (*(t)->_dmamem_free)((t), (sg), (n))
540: #define bus_dmamem_map(t, sg, n, s, k, f) \
541: (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
542: #define bus_dmamem_unmap(t, k, s) \
543: (*(t)->_dmamem_unmap)((t), (k), (s))
544: #define bus_dmamem_mmap(t, sg, n, o, p, f) \
545: (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
546:
547: /*
548: * bus_dmamap_t
549: *
550: * Describes a DMA mapping.
551: */
552: struct _bus_dmamap {
553: /*
554: * PRIVATE MEMBERS: not for use my machine-independent code.
555: */
556: bus_size_t _dm_size; /* largest DMA transfer mappable */
557: int _dm_segcnt; /* number of segs this map can map */
558: bus_size_t _dm_maxsegsz; /* largest possible segment */
559: bus_size_t _dm_boundary; /* don't cross this */
560: int _dm_flags; /* misc. flags */
561:
562: void *_dm_cookie; /* cookie for bus-specific functions */
563:
564: /*
565: * PUBLIC MEMBERS: these are used by machine-independent code.
566: */
567: bus_size_t dm_mapsize; /* size of the mapping */
568: int dm_nsegs; /* # valid segments in mapping */
569: bus_dma_segment_t dm_segs[1]; /* segments; variable length */
570: };
571:
572: #if defined(_LANDISK_BUS_DMA_PRIVATE)
573: int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
574: bus_size_t, int, bus_dmamap_t *);
575: void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
576: int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t,
577: struct proc *, int);
578: int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *,int);
579: int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int);
580: int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *,
581: int, bus_size_t, int);
582: void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
583: void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
584: bus_size_t, int);
585:
586: int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
587: bus_size_t alignment, bus_size_t boundary, bus_dma_segment_t *segs,
588: int nsegs, int *rsegs, int flags);
589: void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
590: int nsegs);
591: int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, int nsegs,
592: size_t size, caddr_t *kvap, int flags);
593: void _bus_dmamem_unmap(bus_dma_tag_t tag, caddr_t kva, size_t size);
594: paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
595: int nsegs, off_t off, int prot, int flags);
596: #endif /* _LANDISK_BUS_DMA_PRIVATE */
597:
598: #endif /* _LANDISK_BUS_H_ */
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