Annotation of sys/arch/i386/pci/via8231reg.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: via8231reg.h,v 1.4 2005/10/26 21:38:28 mickey Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 2005, by Michael Shalayeff
! 5: * Copyright (c) 2003, by Matthew Gream
! 6: * Copyright (c) 1999, by UCHIYAMA Yasushi
! 7: * All rights reserved.
! 8: *
! 9: * Redistribution and use in source and binary forms, with or without
! 10: * modification, are permitted provided that the following conditions
! 11: * are met:
! 12: * 1. Redistributions of source code must retain the above copyright
! 13: * notice, this list of conditions and the following disclaimer.
! 14: * 2. The name of the developer may NOT be used to endorse or promote products
! 15: * derived from this software without specific prior written permission.
! 16: *
! 17: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
! 18: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! 19: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 20: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
! 21: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 22: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 23: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 24: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 25: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 26: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 27: * SUCH DAMAGE.
! 28: */
! 29:
! 30: /*
! 31: * Register definitions for the VIA8231 PCI to ISA Bridge
! 32: */
! 33:
! 34: /*
! 35: * Edge Triggered Interrupt Select register. (0x54)
! 36: * bits 7-4: reserved
! 37: * bit 3: Edge Triggered Interrupt Select for PCI Interrupt A
! 38: * bit 2: Edge Triggered Interrupt Select for PCI Interrupt B
! 39: * bit 1: Edge Triggered Interrupt Select for PCI Interrupt C
! 40: * bit 0: Edge Triggered Interrupt Select for PCI Interrupt D
! 41: * 0 = Non-invert (level)
! 42: * 1 = Invert (edge)
! 43: *
! 44: * PIRQ Select register. (0x55 - 0x57)
! 45: * (0x55)
! 46: * bits 7-4: PINTA# Routing
! 47: * bits 3-0: reserved
! 48: * (0x56)
! 49: * bits 7-4: PINTC# Routing
! 50: * bits 3-0: PINTB# Routing
! 51: * (0x57)
! 52: * bits 7-4: PINTD# Routing
! 53: * bits 3-0: reserved
! 54: * PIRQ Select register. (0x44 - 0x47)
! 55: * (0x44)
! 56: * bits 7-4: PINTF# Routing
! 57: * bits 3-0: PINTE# Routing
! 58: * (0x45)
! 59: * bits 7-4: PINTH# Routing
! 60: * bits 3-0: PINTG# Routing
! 61: * (0x46)
! 62: * bit 4: EFGH/ABCD share (1 -- use above mappings)
! 63: * bit 3: Edge Triggered Interrupt Select for PCI Interrupt H
! 64: * bit 2: Edge Triggered Interrupt Select for PCI Interrupt G
! 65: * bit 1: Edge Triggered Interrupt Select for PCI Interrupt F
! 66: * bit 0: Edge Triggered Interrupt Select for PCI Interrupt E
! 67: *
! 68: * 0000: Disabled 0100: IRQ4 1000: Reserved 1100: IRQ12
! 69: * 0001: IRQ1 0101: IRQ5 1001: IRQ9 1101: Reserved
! 70: * 0010: Reserved 0110: IRQ6 1010: IRQ10 1110: IRQ14
! 71: * 0011: IRQ3 0111: IRQ7 1011: IRQ11 1111: IRQ15
! 72: */
! 73: #define VIA8231_CFG_PIR 0x54
! 74: #define VIA8237_CFG_PIR 0x44
! 75:
! 76: #define VIA8231_TRIGGER_CNFG_MASK 0x000000ff
! 77: #define VIA8231_TRIGGER_CNFG_SHFT 0
! 78: #define VIA8237_TRIGGER_CNFG_MASK 0x000f0000
! 79: #define VIA8237_TRIGGER_CNFG_SHFT 16
! 80: #define VIA8231_TRIGGER_CNFG_LEVEL 0
! 81: #define VIA8231_TRIGGER_CNFG_EDGE 1
! 82: #define VIA8237_TRIGGER_CNFG_ENA 0x00100000
! 83:
! 84: #define VIA8231_GET_TRIGGER(ph) \
! 85: ((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \
! 86: & VIA8231_TRIGGER_CNFG_MASK) >> VIA8231_TRIGGER_CNFG_SHFT)
! 87: #define VIA8237_GET_TRIGGER(ph) \
! 88: ((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
! 89: & VIA8237_TRIGGER_CNFG_MASK) >> VIA8237_TRIGGER_CNFG_SHFT)
! 90:
! 91: #define VIA8231_SET_TRIGGER(ph, n) \
! 92: pci_conf_write((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR, \
! 93: (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \
! 94: & ~VIA8231_TRIGGER_CNFG_MASK) | ((n) << VIA8231_TRIGGER_CNFG_SHFT))
! 95: #define VIA8237_SET_TRIGGER(ph, n) \
! 96: pci_conf_write((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR, \
! 97: (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
! 98: & ~VIA8237_TRIGGER_CNFG_MASK) | ((n) << VIA8237_TRIGGER_CNFG_SHFT))
! 99:
! 100:
! 101: #define VIA8231_ROUTING_CNFG_MASK 0xffffff00
! 102: #define VIA8231_ROUTING_CNFG_SHFT 8 /* skip 0x54 triggers */
! 103: #define VIA8231_ROUTING_CNFG_DISABLED 0
! 104: #define VIA8237_ROUTING_CNFG_MASK 0xffff
! 105: #define VIA8237_ROUTING_CNFG_SHFT 0
! 106:
! 107: #define VIA8231_GET_ROUTING(ph) \
! 108: ((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \
! 109: & VIA8231_ROUTING_CNFG_MASK) >> VIA8231_ROUTING_CNFG_SHFT)
! 110: #define VIA8237_GET_ROUTING(ph) \
! 111: ((pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
! 112: & VIA8237_ROUTING_CNFG_MASK) >> VIA8237_ROUTING_CNFG_SHFT)
! 113:
! 114: #define VIA8231_SET_ROUTING(ph, n) \
! 115: pci_conf_write((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR, \
! 116: (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8231_CFG_PIR) \
! 117: & ~VIA8231_ROUTING_CNFG_MASK) | ((n) << VIA8231_ROUTING_CNFG_SHFT))
! 118: #define VIA8237_SET_ROUTING(ph, n) \
! 119: pci_conf_write((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR, \
! 120: (pci_conf_read((ph)->ph_pc, (ph)->ph_tag, VIA8237_CFG_PIR) \
! 121: & ~VIA8237_ROUTING_CNFG_MASK) | \
! 122: ((n) << VIA8237_ROUTING_CNFG_SHFT) | VIA8237_TRIGGER_CNFG_ENA)
! 123:
! 124:
! 125: #define VIA8231_PIRQ_MASK 0xdefa
! 126: #define VIA8231_PIRQ_LEGAL(irq) \
! 127: ((irq) >= 0 && (irq) <= 15 && ((1 << (irq)) & VIA8231_PIRQ_MASK))
! 128: #define VIA8231_LINK_MAX 3
! 129: #define VIA8237_LINK_MAX 7
! 130: #define VIA8231_LINK_LEGAL(link) \
! 131: ((link) >= 0 && (link) <= VIA8231_LINK_MAX)
! 132: #define VIA8237_LINK_LEGAL(link) \
! 133: ((link) >= 0 && (link) <= VIA8237_LINK_MAX)
! 134: #define VIA8231_TRIG_LEGAL(trig) \
! 135: ((trig) == IST_LEVEL || (trig) == IST_EDGE)
! 136:
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