Annotation of sys/arch/i386/pci/pci_intr_fixup.c, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: pci_intr_fixup.c,v 1.57 2007/07/07 13:52:42 grange Exp $ */
! 2: /* $NetBSD: pci_intr_fixup.c,v 1.10 2000/08/10 21:18:27 soda Exp $ */
! 3:
! 4: /*
! 5: * Copyright (c) 2001 Michael Shalayeff
! 6: * All rights reserved.
! 7: *
! 8: * Redistribution and use in source and binary forms, with or without
! 9: * modification, are permitted provided that the following conditions
! 10: * are met:
! 11: * 1. Redistributions of source code must retain the above copyright
! 12: * notice, this list of conditions and the following disclaimer.
! 13: * 2. Redistributions in binary form must reproduce the above copyright
! 14: * notice, this list of conditions and the following disclaimer in the
! 15: * documentation and/or other materials provided with the distribution.
! 16: *
! 17: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 18: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
! 19: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
! 20: * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
! 21: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
! 22: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
! 23: * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 24: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
! 25: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
! 26: * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
! 27: * THE POSSIBILITY OF SUCH DAMAGE.
! 28: */
! 29: /*-
! 30: * Copyright (c) 1999 The NetBSD Foundation, Inc.
! 31: * All rights reserved.
! 32: *
! 33: * This code is derived from software contributed to The NetBSD Foundation
! 34: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
! 35: * NASA Ames Research Center.
! 36: *
! 37: * Redistribution and use in source and binary forms, with or without
! 38: * modification, are permitted provided that the following conditions
! 39: * are met:
! 40: * 1. Redistributions of source code must retain the above copyright
! 41: * notice, this list of conditions and the following disclaimer.
! 42: * 2. Redistributions in binary form must reproduce the above copyright
! 43: * notice, this list of conditions and the following disclaimer in the
! 44: * documentation and/or other materials provided with the distribution.
! 45: * 3. All advertising materials mentioning features or use of this software
! 46: * must display the following acknowledgement:
! 47: * This product includes software developed by the NetBSD
! 48: * Foundation, Inc. and its contributors.
! 49: * 4. Neither the name of The NetBSD Foundation nor the names of its
! 50: * contributors may be used to endorse or promote products derived
! 51: * from this software without specific prior written permission.
! 52: *
! 53: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
! 54: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 55: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 56: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
! 57: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 58: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 59: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 60: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 61: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 62: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 63: * POSSIBILITY OF SUCH DAMAGE.
! 64: */
! 65: /*
! 66: * Copyright (c) 1999, by UCHIYAMA Yasushi
! 67: * All rights reserved.
! 68: *
! 69: * Redistribution and use in source and binary forms, with or without
! 70: * modification, are permitted provided that the following conditions
! 71: * are met:
! 72: * 1. Redistributions of source code must retain the above copyright
! 73: * notice, this list of conditions and the following disclaimer.
! 74: * 2. The name of the developer may NOT be used to endorse or promote products
! 75: * derived from this software without specific prior written permission.
! 76: *
! 77: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
! 78: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
! 79: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
! 80: * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
! 81: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
! 82: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
! 83: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 84: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
! 85: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
! 86: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
! 87: * SUCH DAMAGE.
! 88: */
! 89:
! 90: /*
! 91: * PCI Interrupt Router support.
! 92: */
! 93:
! 94: #include <sys/param.h>
! 95: #include <sys/systm.h>
! 96: #include <sys/kernel.h>
! 97: #include <sys/malloc.h>
! 98: #include <sys/queue.h>
! 99: #include <sys/device.h>
! 100:
! 101: #include <machine/bus.h>
! 102: #include <machine/intr.h>
! 103: #include <machine/i8259.h>
! 104: #include <machine/i82093var.h>
! 105:
! 106: #include <dev/pci/pcireg.h>
! 107: #include <dev/pci/pcivar.h>
! 108: #include <dev/pci/pcidevs.h>
! 109:
! 110: #include <i386/pci/pcibiosvar.h>
! 111:
! 112: struct pciintr_link_map {
! 113: int link, clink, irq, fixup_stage;
! 114: u_int16_t bitmap;
! 115: SIMPLEQ_ENTRY(pciintr_link_map) list;
! 116: };
! 117:
! 118: pciintr_icu_tag_t pciintr_icu_tag = NULL;
! 119: pciintr_icu_handle_t pciintr_icu_handle;
! 120:
! 121: #ifdef PCIBIOS_IRQS_HINT
! 122: int pcibios_irqs_hint = PCIBIOS_IRQS_HINT;
! 123: #endif
! 124:
! 125: struct pciintr_link_map *pciintr_link_lookup(int);
! 126: struct pcibios_intr_routing *pciintr_pir_lookup(int, int);
! 127: int pciintr_bitmap_count_irq(int, int *);
! 128:
! 129: SIMPLEQ_HEAD(, pciintr_link_map) pciintr_link_map_list;
! 130:
! 131: const struct pciintr_icu_table {
! 132: pci_vendor_id_t piit_vendor;
! 133: pci_product_id_t piit_product;
! 134: int (*piit_init)(pci_chipset_tag_t,
! 135: bus_space_tag_t, pcitag_t, pciintr_icu_tag_t *,
! 136: pciintr_icu_handle_t *);
! 137: } pciintr_icu_table[] = {
! 138: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6300ESB_LPC,
! 139: piix_init },
! 140: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_6321ESB_LPC,
! 141: piix_init },
! 142: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371MX,
! 143: piix_init },
! 144: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371AB_ISA,
! 145: piix_init },
! 146: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371FB_ISA,
! 147: piix_init },
! 148: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82371SB_ISA,
! 149: piix_init },
! 150: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82440MX_ISA,
! 151: piix_init },
! 152: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AA_LPC,
! 153: piix_init },
! 154: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801AB_LPC,
! 155: piix_init },
! 156: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BA_LPC,
! 157: piix_init },
! 158: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801BAM_LPC,
! 159: piix_init },
! 160: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CA_LPC,
! 161: piix_init },
! 162: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801CAM_LPC,
! 163: piix_init },
! 164: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LPC,
! 165: piix_init },
! 166: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DBM_LPC,
! 167: piix_init },
! 168: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LPC,
! 169: piix_init },
! 170: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801EB_LPC,
! 171: piix_init },
! 172: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LPC,
! 173: piix_init },
! 174: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FBM_LPC,
! 175: piix_init },
! 176: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_LPC,
! 177: piix_init },
! 178: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GBM_LPC,
! 179: piix_init },
! 180: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GH_LPC,
! 181: piix_init },
! 182: { PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GHM_LPC,
! 183: piix_init },
! 184:
! 185: { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C558,
! 186: opti82c558_init },
! 187: { PCI_VENDOR_OPTI, PCI_PRODUCT_OPTI_82C700,
! 188: opti82c700_init },
! 189:
! 190: { PCI_VENDOR_RCC, PCI_PRODUCT_RCC_OSB4,
! 191: osb4_init },
! 192: { PCI_VENDOR_RCC, PCI_PRODUCT_RCC_CSB5,
! 193: osb4_init },
! 194:
! 195: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C586_ISA,
! 196: via82c586_init, },
! 197: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C596A,
! 198: via82c586_init, },
! 199: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT82C686A_ISA,
! 200: via82c586_init },
! 201:
! 202: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8231_ISA,
! 203: via8231_init },
! 204: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8233_ISA,
! 205: via8231_init },
! 206: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8233A_ISA,
! 207: via8231_init },
! 208: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8235_ISA,
! 209: via8231_init },
! 210: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237_ISA,
! 211: via8231_init },
! 212: { PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237A_ISA,
! 213: via8231_init },
! 214:
! 215: { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_85C503,
! 216: sis85c503_init },
! 217: { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_962,
! 218: sis85c503_init },
! 219: { PCI_VENDOR_SIS, PCI_PRODUCT_SIS_963,
! 220: sis85c503_init },
! 221:
! 222: { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC756_PMC,
! 223: amd756_init },
! 224: { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_766_PMC,
! 225: amd756_init },
! 226: { PCI_VENDOR_AMD, PCI_PRODUCT_AMD_PBC768_PMC,
! 227: amd756_init },
! 228:
! 229: { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1533,
! 230: ali1543_init },
! 231:
! 232: { PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M1543,
! 233: ali1543_init },
! 234:
! 235: { 0, 0,
! 236: NULL },
! 237: };
! 238:
! 239: const struct pciintr_icu_table *pciintr_icu_lookup(pcireg_t);
! 240:
! 241: const struct pciintr_icu_table *
! 242: pciintr_icu_lookup(id)
! 243: pcireg_t id;
! 244: {
! 245: const struct pciintr_icu_table *piit;
! 246:
! 247: for (piit = pciintr_icu_table; piit->piit_init != NULL; piit++)
! 248: if (PCI_VENDOR(id) == piit->piit_vendor &&
! 249: PCI_PRODUCT(id) == piit->piit_product)
! 250: return (piit);
! 251:
! 252: return (NULL);
! 253: }
! 254:
! 255: struct pciintr_link_map *
! 256: pciintr_link_lookup(int link)
! 257: {
! 258: struct pciintr_link_map *l;
! 259:
! 260: for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
! 261: l = SIMPLEQ_NEXT(l, list))
! 262: if (l->link == link)
! 263: return (l);
! 264:
! 265: return (NULL);
! 266: }
! 267:
! 268: static __inline struct pciintr_link_map *
! 269: pciintr_link_alloc(pci_chipset_tag_t pc, struct pcibios_intr_routing *pir, int pin)
! 270: {
! 271: int link = pir->linkmap[pin].link, clink, irq;
! 272: struct pciintr_link_map *l, *lstart;
! 273:
! 274: if (pciintr_icu_tag != NULL) {
! 275: /*
! 276: * Get the canonical link value for this entry.
! 277: */
! 278: if (pciintr_icu_getclink(pciintr_icu_tag, pciintr_icu_handle,
! 279: link, &clink) != 0) {
! 280: /*
! 281: * ICU doesn't understand the link value.
! 282: * Just ignore this PIR entry.
! 283: */
! 284: PCIBIOS_PRINTV(("pciintr_link_alloc: bus %d device %d: "
! 285: "ignoring link 0x%02x\n", pir->bus,
! 286: PIR_DEVFUNC_DEVICE(pir->device), link));
! 287: return (NULL);
! 288: }
! 289:
! 290: /*
! 291: * Check the link value by asking the ICU for the
! 292: * canonical link value.
! 293: * Also, determine if this PIRQ is mapped to an IRQ.
! 294: */
! 295: if (pciintr_icu_get_intr(pciintr_icu_tag, pciintr_icu_handle,
! 296: clink, &irq) != 0) {
! 297: /*
! 298: * ICU doesn't understand the canonical link value.
! 299: * Just ignore this PIR entry.
! 300: */
! 301: PCIBIOS_PRINTV(("pciintr_link_alloc: "
! 302: "bus %d device %d link 0x%02x: "
! 303: "ignoring PIRQ 0x%02x\n", pir->bus,
! 304: PIR_DEVFUNC_DEVICE(pir->device), link, clink));
! 305: return (NULL);
! 306: }
! 307: }
! 308:
! 309: if ((l = malloc(sizeof(*l), M_DEVBUF, M_NOWAIT)) == NULL)
! 310: return (NULL);
! 311:
! 312: memset(l, 0, sizeof(*l));
! 313:
! 314: l->link = link;
! 315: l->bitmap = pir->linkmap[pin].bitmap;
! 316: if (pciintr_icu_tag != NULL) { /* compatible PCI ICU found */
! 317: l->clink = clink;
! 318: l->irq = irq; /* maybe I386_PCI_INTERRUPT_LINE_NO_CONNECTION */
! 319: } else {
! 320: l->clink = link;
! 321: l->irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
! 322: }
! 323:
! 324: lstart = SIMPLEQ_FIRST(&pciintr_link_map_list);
! 325: if (lstart == NULL || lstart->link < l->link)
! 326: SIMPLEQ_INSERT_TAIL(&pciintr_link_map_list, l, list);
! 327: else
! 328: SIMPLEQ_INSERT_HEAD(&pciintr_link_map_list, l, list);
! 329:
! 330: return (l);
! 331: }
! 332:
! 333: struct pcibios_intr_routing *
! 334: pciintr_pir_lookup(int bus, int device)
! 335: {
! 336: struct pcibios_intr_routing *pir;
! 337: int entry;
! 338:
! 339: if (pcibios_pir_table == NULL)
! 340: return (NULL);
! 341:
! 342: for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
! 343: pir = &pcibios_pir_table[entry];
! 344: if (pir->bus == bus &&
! 345: PIR_DEVFUNC_DEVICE(pir->device) == device)
! 346: return (pir);
! 347: }
! 348:
! 349: return (NULL);
! 350: }
! 351:
! 352: int
! 353: pciintr_bitmap_count_irq(int irq_bitmap, int *irqp)
! 354: {
! 355: int i, bit, count = 0, irq = I386_PCI_INTERRUPT_LINE_NO_CONNECTION;
! 356:
! 357: if (irq_bitmap != 0)
! 358: for (i = 0, bit = 1; i < 16; i++, bit <<= 1)
! 359: if (irq_bitmap & bit) {
! 360: irq = i;
! 361: count++;
! 362: }
! 363:
! 364: *irqp = irq;
! 365: return (count);
! 366: }
! 367:
! 368: static __inline int
! 369: pciintr_link_init(pci_chipset_tag_t pc)
! 370: {
! 371: int entry, pin, link;
! 372: struct pcibios_intr_routing *pir;
! 373: struct pciintr_link_map *l;
! 374:
! 375: if (pcibios_pir_table == NULL) {
! 376: /* No PIR table; can't do anything. */
! 377: printf("pciintr_link_init: no PIR table\n");
! 378: return (1);
! 379: }
! 380:
! 381: SIMPLEQ_INIT(&pciintr_link_map_list);
! 382:
! 383: for (entry = 0; entry < pcibios_pir_table_nentries; entry++) {
! 384: pir = &pcibios_pir_table[entry];
! 385: for (pin = 0; pin < PCI_INTERRUPT_PIN_MAX; pin++) {
! 386: if ((link = pir->linkmap[pin].link) == 0)
! 387: /* No connection for this pin. */
! 388: continue;
! 389:
! 390: /*
! 391: * Multiple devices may be wired to the same
! 392: * interrupt; check to see if we've seen this
! 393: * one already. If not, allocate a new link
! 394: * map entry and stuff it in the map.
! 395: */
! 396: if ((l = pciintr_link_lookup(link)) == NULL)
! 397: pciintr_link_alloc(pc, pir, pin);
! 398: else if (pir->linkmap[pin].bitmap != l->bitmap) {
! 399: /*
! 400: * violates PCI IRQ Routing Table Specification
! 401: */
! 402: PCIBIOS_PRINTV(("pciintr_link_init: "
! 403: "bus %d device %d link 0x%02x: "
! 404: "bad irq bitmap 0x%04x, "
! 405: "should be 0x%04x\n", pir->bus,
! 406: PIR_DEVFUNC_DEVICE(pir->device), link,
! 407: pir->linkmap[pin].bitmap, l->bitmap));
! 408: /* safer value. */
! 409: l->bitmap &= pir->linkmap[pin].bitmap;
! 410: /* XXX - or, should ignore this entry? */
! 411: }
! 412: }
! 413: }
! 414:
! 415: return (0);
! 416: }
! 417:
! 418: /*
! 419: * No compatible PCI ICU found.
! 420: * Hopes the BIOS already setup the ICU.
! 421: */
! 422: static __inline int
! 423: pciintr_guess_irq(void)
! 424: {
! 425: struct pciintr_link_map *l;
! 426: int irq, guessed = 0;
! 427:
! 428: /*
! 429: * Stage 1: If only one IRQ is available for the link, use it.
! 430: */
! 431: for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
! 432: l = SIMPLEQ_NEXT(l, list)) {
! 433: if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
! 434: continue;
! 435: if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
! 436: l->irq = irq;
! 437: l->fixup_stage = 1;
! 438: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 439: printf("pciintr_guess_irq (stage 1): "
! 440: "guessing PIRQ 0x%02x to be IRQ %d\n",
! 441: l->clink, l->irq);
! 442: guessed = 1;
! 443: }
! 444: }
! 445:
! 446: return (guessed ? 0 : -1);
! 447: }
! 448:
! 449: static __inline int
! 450: pciintr_link_fixup(void)
! 451: {
! 452: struct pciintr_link_map *l;
! 453: u_int16_t pciirq = 0;
! 454: int irq;
! 455:
! 456: /*
! 457: * First stage: Attempt to connect PIRQs which aren't
! 458: * yet connected.
! 459: */
! 460: for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
! 461: l = SIMPLEQ_NEXT(l, list)) {
! 462: if (l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
! 463: /*
! 464: * Interrupt is already connected. Don't do
! 465: * anything to it.
! 466: * In this case, l->fixup_stage == 0.
! 467: */
! 468: pciirq |= 1 << l->irq;
! 469: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 470: printf("pciintr_link_fixup: PIRQ 0x%02x is "
! 471: "already connected to IRQ %d\n",
! 472: l->clink, l->irq);
! 473: continue;
! 474: }
! 475: /*
! 476: * Interrupt isn't connected. Attempt to assign it to an IRQ.
! 477: */
! 478: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 479: printf("pciintr_link_fixup: PIRQ 0x%02x not connected",
! 480: l->clink);
! 481:
! 482: /*
! 483: * Just do the easy case now; we'll defer the harder ones
! 484: * to Stage 2.
! 485: */
! 486: if (pciintr_bitmap_count_irq(l->bitmap, &irq) == 1) {
! 487: l->irq = irq;
! 488: l->fixup_stage = 1;
! 489: pciirq |= 1 << irq;
! 490: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 491: printf(", assigning IRQ %d", l->irq);
! 492: }
! 493: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 494: printf("\n");
! 495: }
! 496:
! 497: /*
! 498: * Stage 2: Attempt to connect PIRQs which we didn't
! 499: * connect in Stage 1.
! 500: */
! 501: for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
! 502: l = SIMPLEQ_NEXT(l, list))
! 503: if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION &&
! 504: (irq = ffs(l->bitmap & pciirq)) > 0) {
! 505: /*
! 506: * This IRQ is a valid PCI IRQ already
! 507: * connected to another PIRQ, and also an
! 508: * IRQ our PIRQ can use; connect it up!
! 509: */
! 510: l->fixup_stage = 2;
! 511: l->irq = irq - 1;
! 512: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 513: printf("pciintr_link_fixup (stage 2): "
! 514: "assigning IRQ %d to PIRQ 0x%02x\n",
! 515: l->irq, l->clink);
! 516: }
! 517:
! 518: #ifdef PCIBIOS_IRQS_HINT
! 519: /*
! 520: * Stage 3: The worst case. I need configuration hint that
! 521: * user supplied a mask for the PCI irqs
! 522: */
! 523: for (l = SIMPLEQ_FIRST(&pciintr_link_map_list); l != NULL;
! 524: l = SIMPLEQ_NEXT(l, list)) {
! 525: if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION &&
! 526: (irq = ffs(l->bitmap & pcibios_irqs_hint)) > 0) {
! 527: l->fixup_stage = 3;
! 528: l->irq = irq - 1;
! 529: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 530: printf("pciintr_link_fixup (stage 3): "
! 531: "assigning IRQ %d to PIRQ 0x%02x\n",
! 532: l->irq, l->clink);
! 533: }
! 534: }
! 535: #endif /* PCIBIOS_IRQS_HINT */
! 536:
! 537: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 538: printf("pciintr_link_fixup: piirq 0x%04x\n", pciirq);
! 539:
! 540: return (0);
! 541: }
! 542:
! 543: int
! 544: pci_intr_route_link(pci_chipset_tag_t pc, pci_intr_handle_t *ihp)
! 545: {
! 546: struct pciintr_link_map *l;
! 547: pcireg_t intr;
! 548: int irq, rv = 1;
! 549: char *p = NULL;
! 550:
! 551: if (pcibios_flags & PCIBIOS_INTR_FIXUP)
! 552: return 1;
! 553:
! 554: irq = ihp->line & APIC_INT_LINE_MASK;
! 555: if (irq != 0 && irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
! 556: pcibios_pir_header.exclusive_irq |= 1 << irq;
! 557:
! 558: l = ihp->link;
! 559: if (!l || pciintr_icu_tag == NULL)
! 560: return (1);
! 561:
! 562: if (l->fixup_stage == 0) {
! 563: if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
! 564: /* Appropriate interrupt was not found. */
! 565: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 566: printf("pci_intr_route_link: PIRQ 0x%02x: "
! 567: "no IRQ, try "
! 568: "\"option PCIBIOS_IRQS_HINT=0x%04x\"\n",
! 569: l->clink,
! 570: /* suggest irq 9/10/11, if possible */
! 571: (l->bitmap & 0x0e00) ? (l->bitmap & 0x0e00)
! 572: : l->bitmap);
! 573: } else
! 574: p = " preserved BIOS setting";
! 575: } else {
! 576:
! 577: if (pciintr_icu_set_intr(pciintr_icu_tag, pciintr_icu_handle,
! 578: l->clink, l->irq) != 0 ||
! 579: pciintr_icu_set_trigger(pciintr_icu_tag, pciintr_icu_handle,
! 580: l->irq, IST_LEVEL) != 0) {
! 581: p = " failed";
! 582: rv = 0;
! 583: } else
! 584: p = "";
! 585: }
! 586: if (p && pcibios_flags & PCIBIOS_INTRDEBUG)
! 587: printf("pci_intr_route_link: route PIRQ 0x%02x -> IRQ %d%s\n",
! 588: l->clink, l->irq, p);
! 589:
! 590: if (!rv)
! 591: return (0);
! 592:
! 593: /*
! 594: * IRQs 14 and 15 are reserved for PCI IDE interrupts; don't muck
! 595: * with them.
! 596: */
! 597: if (irq == 14 || irq == 15)
! 598: return (1);
! 599:
! 600: intr = pci_conf_read(pc, ihp->tag, PCI_INTERRUPT_REG);
! 601: if (irq != PCI_INTERRUPT_LINE(intr)) {
! 602: intr &= ~(PCI_INTERRUPT_LINE_MASK << PCI_INTERRUPT_LINE_SHIFT);
! 603: intr |= irq << PCI_INTERRUPT_LINE_SHIFT;
! 604: pci_conf_write(pc, ihp->tag, PCI_INTERRUPT_REG, intr);
! 605: }
! 606:
! 607: return (1);
! 608: }
! 609:
! 610: int
! 611: pci_intr_post_fixup(void)
! 612: {
! 613: struct pciintr_link_map *l;
! 614: int i, pciirq;
! 615:
! 616: if (pcibios_flags & PCIBIOS_INTR_FIXUP)
! 617: return 1;
! 618:
! 619: if (!pciintr_icu_handle)
! 620: return 0;
! 621:
! 622: pciirq = pcibios_pir_header.exclusive_irq;
! 623: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 624: printf("pci_intr_post_fixup: PCI IRQs:");
! 625: for (l = SIMPLEQ_FIRST(&pciintr_link_map_list);
! 626: l != NULL; l = SIMPLEQ_NEXT(l, list))
! 627: if (l->fixup_stage == 0 && l->irq != 0 &&
! 628: l->irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
! 629: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 630: printf(" %d", l->irq);
! 631: pciirq |= (1 << l->irq);
! 632: }
! 633:
! 634: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 635: printf("; ISA IRQs:");
! 636: for (i = 0; i < 16; i++)
! 637: if (!(pciirq & (1 << i))) {
! 638: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 639: printf(" %d", i);
! 640: pciintr_icu_set_trigger(pciintr_icu_tag,
! 641: pciintr_icu_handle, i, IST_EDGE);
! 642: }
! 643:
! 644: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 645: printf("\n");
! 646:
! 647: return (0);
! 648: }
! 649:
! 650: int
! 651: pci_intr_header_fixup(pci_chipset_tag_t pc, pcitag_t tag,
! 652: pci_intr_handle_t *ihp)
! 653: {
! 654: struct pcibios_intr_routing *pir;
! 655: struct pciintr_link_map *l;
! 656: int irq, link, bus, device, function;
! 657: char *p = NULL;
! 658:
! 659: if (pcibios_flags & PCIBIOS_INTR_FIXUP)
! 660: return 1;
! 661:
! 662: irq = ihp->line & APIC_INT_LINE_MASK;
! 663: ihp->link = NULL;
! 664: ihp->tag = tag;
! 665: pci_decompose_tag(pc, tag, &bus, &device, &function);
! 666:
! 667: if ((pir = pciintr_pir_lookup(bus, device)) == NULL ||
! 668: (link = pir->linkmap[ihp->pin - 1].link) == 0) {
! 669: PCIBIOS_PRINTV(("Interrupt not connected; no need to change."));
! 670: return 1;
! 671: }
! 672:
! 673: if ((l = pciintr_link_lookup(link)) == NULL) {
! 674: /*
! 675: * No link map entry.
! 676: * Probably pciintr_icu_getclink() or pciintr_icu_get_intr()
! 677: * has failed.
! 678: */
! 679: if (pcibios_flags & PCIBIOS_INTRDEBUG)
! 680: printf("pci_intr_header_fixup: no entry for link "
! 681: "0x%02x (%d:%d:%d:%c)\n",
! 682: link, bus, device, function, '@' + ihp->pin);
! 683: return 1;
! 684: }
! 685:
! 686: ihp->link = l;
! 687: if (irq == 14 || irq == 15) {
! 688: p = " WARNING: ignored";
! 689: ihp->link = NULL;
! 690: } else if (l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
! 691:
! 692: /* Appropriate interrupt was not found. */
! 693: if (pciintr_icu_tag == NULL && irq != 0 &&
! 694: irq != I386_PCI_INTERRUPT_LINE_NO_CONNECTION)
! 695: /*
! 696: * Do not print warning,
! 697: * if no compatible PCI ICU found,
! 698: * but the irq is already assigned by BIOS.
! 699: */
! 700: p = "";
! 701: else
! 702: p = " WARNING: missing";
! 703: } else if (irq == 0 || irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION) {
! 704:
! 705: p = " fixed up";
! 706: ihp->line = irq = l->irq;
! 707:
! 708: } else if (pcibios_flags & PCIBIOS_FIXUP_FORCE) {
! 709: /* routed by BIOS, but inconsistent */
! 710: /* believe PCI IRQ Routing table */
! 711: p = " WARNING: overriding";
! 712: ihp->line = irq = l->irq;
! 713: } else {
! 714: /* believe PCI Interrupt Configuration Register (default) */
! 715: p = " WARNING: preserving";
! 716: ihp->line = (l->irq = irq) | (l->clink & PCI_INT_VIA_ISA);
! 717: }
! 718:
! 719: if (pcibios_flags & PCIBIOS_INTRDEBUG) {
! 720: pcireg_t id = pci_conf_read(pc, tag, PCI_ID_REG);
! 721:
! 722: printf("\n%d:%d:%d %04x:%04x pin %c clink 0x%02x irq %d "
! 723: "stage %d %s irq %d\n", bus, device, function,
! 724: PCI_VENDOR(id), PCI_PRODUCT(id), '@' + ihp->pin, l->clink,
! 725: ((l->irq == I386_PCI_INTERRUPT_LINE_NO_CONNECTION)?
! 726: -1 : l->irq), l->fixup_stage, p, irq);
! 727: }
! 728:
! 729: return (1);
! 730: }
! 731:
! 732: int
! 733: pci_intr_fixup(struct pcibios_softc *sc, pci_chipset_tag_t pc,
! 734: bus_space_tag_t iot)
! 735: {
! 736: struct pcibios_pir_header *pirh = &pcibios_pir_header;
! 737: const struct pciintr_icu_table *piit = NULL;
! 738: pcitag_t icutag;
! 739:
! 740: /*
! 741: * Attempt to initialize our PCI interrupt router. If
! 742: * the PIR Table is present in ROM, use the location
! 743: * specified by the PIR Table, and use the compat ID,
! 744: * if present. Otherwise, we have to look for the router
! 745: * ourselves (the PCI-ISA bridge).
! 746: *
! 747: * A number of buggy BIOS implementations leave the router
! 748: * entry as 000:00:0, which is typically not the correct
! 749: * device/function. If the router device address is set to
! 750: * this value, and the compatible router entry is undefined
! 751: * (zero is the correct value to indicate undefined), then we
! 752: * work on the basis it is most likely an error, and search
! 753: * the entire device-space of bus 0 (but obviously starting
! 754: * with 000:00:0, in case that really is the right one).
! 755: */
! 756: if (pirh->signature != 0 && (pirh->router_bus != 0 ||
! 757: pirh->router_devfunc != 0 || pirh->compat_router != 0)) {
! 758:
! 759: icutag = pci_make_tag(pc, pirh->router_bus,
! 760: PIR_DEVFUNC_DEVICE(pirh->router_devfunc),
! 761: PIR_DEVFUNC_FUNCTION(pirh->router_devfunc));
! 762: if (pirh->compat_router == 0 ||
! 763: (piit = pciintr_icu_lookup(pirh->compat_router)) == NULL) {
! 764: /*
! 765: * No compat ID, or don't know the compat ID? Read
! 766: * it from the configuration header.
! 767: */
! 768: pirh->compat_router = pci_conf_read(pc, icutag,
! 769: PCI_ID_REG);
! 770: }
! 771: if (piit == NULL)
! 772: piit = pciintr_icu_lookup(pirh->compat_router);
! 773: } else {
! 774: int device, maxdevs = pci_bus_maxdevs(pc, 0);
! 775:
! 776: /*
! 777: * Search configuration space for a known interrupt
! 778: * router.
! 779: */
! 780: for (device = 0; device < maxdevs; device++) {
! 781: const struct pci_quirkdata *qd;
! 782: int function, nfuncs;
! 783: pcireg_t icuid;
! 784: pcireg_t bhlcr;
! 785:
! 786: icutag = pci_make_tag(pc, 0, device, 0);
! 787: icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
! 788:
! 789: /* Invalid vendor ID value? */
! 790: if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
! 791: continue;
! 792: /* XXX Not invalid, but we've done this ~forever. */
! 793: if (PCI_VENDOR(icuid) == 0)
! 794: continue;
! 795:
! 796: qd = pci_lookup_quirkdata(PCI_VENDOR(icuid),
! 797: PCI_PRODUCT(icuid));
! 798:
! 799: bhlcr = pci_conf_read(pc, icutag, PCI_BHLC_REG);
! 800: if (PCI_HDRTYPE_MULTIFN(bhlcr) || (qd != NULL &&
! 801: (qd->quirks & PCI_QUIRK_MULTIFUNCTION) != 0))
! 802: nfuncs = 8;
! 803: else
! 804: nfuncs = 1;
! 805:
! 806: for (function = 0; function < nfuncs; function++) {
! 807: icutag = pci_make_tag(pc, 0, device, function);
! 808: icuid = pci_conf_read(pc, icutag, PCI_ID_REG);
! 809:
! 810: /* Invalid vendor ID value? */
! 811: if (PCI_VENDOR(icuid) == PCI_VENDOR_INVALID)
! 812: continue;
! 813: /* Not invalid, but we've done this ~forever. */
! 814: if (PCI_VENDOR(icuid) == 0)
! 815: continue;
! 816:
! 817: if ((piit = pciintr_icu_lookup(icuid))) {
! 818: pirh->compat_router = icuid;
! 819: pirh->router_bus = 0;
! 820: pirh->router_devfunc =
! 821: PIR_DEVFUNC_COMPOSE(device, 0);
! 822: break;
! 823: }
! 824: }
! 825:
! 826: if (piit != NULL)
! 827: break;
! 828: }
! 829: }
! 830:
! 831: if (piit == NULL) {
! 832: printf("%s: no compatible PCI ICU found", sc->sc_dev.dv_xname);
! 833: if (pirh->signature != 0 && pirh->compat_router != 0)
! 834: printf(": ICU vendor 0x%04x product 0x%04x",
! 835: PCI_VENDOR(pirh->compat_router),
! 836: PCI_PRODUCT(pirh->compat_router));
! 837: printf("\n");
! 838: if (!(pcibios_flags & PCIBIOS_INTR_GUESS)) {
! 839: if (pciintr_link_init(pc))
! 840: return (-1); /* non-fatal */
! 841: if (pciintr_guess_irq())
! 842: return (-1); /* non-fatal */
! 843: }
! 844: return (0);
! 845: } else {
! 846: char devinfo[256];
! 847:
! 848: printf("%s: PCI Interrupt Router at %03d:%02d:%01d",
! 849: sc->sc_dev.dv_xname, pirh->router_bus,
! 850: PIR_DEVFUNC_DEVICE(pirh->router_devfunc),
! 851: PIR_DEVFUNC_FUNCTION(pirh->router_devfunc));
! 852: if (pirh->compat_router != 0) {
! 853: pci_devinfo(pirh->compat_router, 0, 0, devinfo,
! 854: sizeof devinfo);
! 855: printf(" (%s)", devinfo);
! 856: }
! 857: printf("\n");
! 858: }
! 859:
! 860: /*
! 861: * Initialize the PCI ICU.
! 862: */
! 863: if ((*piit->piit_init)(pc, iot, icutag, &pciintr_icu_tag,
! 864: &pciintr_icu_handle) != 0)
! 865: return (-1); /* non-fatal */
! 866:
! 867: /*
! 868: * Initialize the PCI interrupt link map.
! 869: */
! 870: if (pciintr_link_init(pc))
! 871: return (-1); /* non-fatal */
! 872:
! 873: /*
! 874: * Fix up the link->IRQ mappings.
! 875: */
! 876: if (pciintr_link_fixup() != 0)
! 877: return (-1); /* non-fatal */
! 878:
! 879: return (0);
! 880: }
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to pci_intr_fixup.c CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / arch / i386 / pci