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Annotation of sys/arch/i386/pci/geodescreg.h, Revision 1.1.1.1

1.1       nbrk        1: /*      $OpenBSD: geodescreg.h,v 1.3 2006/02/01 13:08:12 mickey Exp $     */
                      2:
                      3: /*
                      4:  * Copyright (c) 2003 Markus Friedl <markus@openbsd.org>
                      5:  *
                      6:  * Permission to use, copy, modify, and distribute this software for any
                      7:  * purpose with or without fee is hereby granted, provided that the above
                      8:  * copyright notice and this permission notice appear in all copies.
                      9:  *
                     10:  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
                     11:  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
                     12:  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
                     13:  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
                     14:  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
                     15:  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
                     16:  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
                     17:  */
                     18:
                     19: /*
                     20:  * Geode SC1100 Information Appliance On a Chip
                     21:  * http://www.national.com/ds.cgi/SC/SC1100.pdf
                     22:  */
                     23:
                     24: /* Configuration Space Register Map */
                     25:
                     26: #define SC1100_F5_SCRATCHPAD   0x64
                     27:
                     28: #define        GCB_WDTO        0x0000  /* WATCHDOG Timeout */
                     29: #define        GCB_WDCNFG      0x0002  /* WATCHDOG Configuration */
                     30: #define        GCB_WDSTS       0x0004  /* WATCHDOG Status */
                     31: #define        GCB_TSC         0x0008  /* Cyclecounter at 27MHz */
                     32: #define        GCB_TSCNFG      0x000c  /* config for the above */
                     33: #define        GCB_IID         0x003c  /* IA On a Chip ID */
                     34: #define        GCB_REV         0x003d  /* Revision */
                     35: #define        GCB_CBA         0x003e  /* Configuration Base Address */
                     36:
                     37: /* Watchdog */
                     38:
                     39: #define        WD32KPD_ENABLE  0x0000
                     40: #define        WD32KPD_DISABLE 0x0100
                     41: #define        WDTYPE1_RESET   0x0030
                     42: #define        WDTYPE2_RESET   0x00c0
                     43: #define        WDPRES_DIV_512  0x0009
                     44: #define        WDPRES_DIV_8192 0x000d
                     45: #define        WDCNFG_MASK     0x00ff
                     46: #define        WDOVF_CLEAR     0x0001
                     47:
                     48: /* cyclecounter */
                     49:
                     50: #define        TSC_ENABLE      0x0200
                     51: