Annotation of sys/arch/i386/include/intr.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: intr.h,v 1.32 2007/05/25 15:55:27 art Exp $ */
2: /* $NetBSD: intr.h,v 1.5 1996/05/13 06:11:28 mycroft Exp $ */
3:
4: /*
5: * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: * 3. All advertising materials mentioning features or use of this software
16: * must display the following acknowledgement:
17: * This product includes software developed by Charles M. Hannum.
18: * 4. The name of the author may not be used to endorse or promote products
19: * derived from this software without specific prior written permission.
20: *
21: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31: */
32:
33: #ifndef _I386_INTR_H_
34: #define _I386_INTR_H_
35:
36: #include <machine/intrdefs.h>
37:
38: #ifndef _LOCORE
39:
40: #ifdef MULTIPROCESSOR
41: #include <machine/i82489reg.h>
42: #include <machine/i82489var.h>
43: #include <machine/cpu.h>
44: #endif
45:
46: extern volatile u_int32_t lapic_tpr; /* Current interrupt priority level. */
47:
48: extern volatile u_int32_t ipending; /* Interrupts pending. */
49: extern int imask[]; /* Bitmasks telling what interrupts are blocked. */
50: extern int iunmask[]; /* Bitmasks telling what interrupts are accepted. */
51:
52: #define IMASK(level) imask[IPL(level)]
53: #define IUNMASK(level) iunmask[IPL(level)]
54:
55: extern void Xspllower(void);
56:
57: extern int splraise(int);
58: extern int spllower(int);
59: extern void splx(int);
60: extern void softintr(int, int);
61:
62: /*
63: * compiler barrier: prevent reordering of instructions.
64: * XXX something similar will move to <sys/cdefs.h>
65: * or thereabouts.
66: * This prevents the compiler from reordering code around
67: * this "instruction", acting as a sequence point for code generation.
68: */
69:
70: #define __splbarrier() __asm __volatile("":::"memory")
71:
72: /* SPL asserts */
73: #ifdef DIAGNOSTIC
74: /*
75: * Although this function is implemented in MI code, it must be in this MD
76: * header because we don't want this header to include MI includes.
77: */
78: void splassert_fail(int, int, const char *);
79: extern int splassert_ctl;
80: void splassert_check(int, const char *);
81: #define splassert(__wantipl) do { \
82: if (splassert_ctl > 0) { \
83: splassert_check(__wantipl, __func__); \
84: } \
85: } while (0)
86: #else
87: #define splassert(wantipl) do { /* nada */ } while (0)
88: #endif
89:
90: /*
91: * Define the splraise and splx code in macros, so that the code can be
92: * reused in a profiling build in a way that does not cause recursion.
93: */
94: #define _SPLRAISE(ocpl, ncpl) \
95: ocpl = lapic_tpr; \
96: if (ncpl > ocpl) \
97: lapic_tpr = ncpl
98:
99:
100: #define _SPLX(ncpl) \
101: lapic_tpr = ncpl; \
102: if (ipending & IUNMASK(ncpl)) \
103: Xspllower()
104:
105: /*
106: * Hardware interrupt masks
107: */
108: #define splbio() splraise(IPL_BIO)
109: #define splnet() splraise(IPL_NET)
110: #define spltty() splraise(IPL_TTY)
111: #define splaudio() splraise(IPL_AUDIO)
112: #define splclock() splraise(IPL_CLOCK)
113: #define splstatclock() splhigh()
114: #define splipi() splraise(IPL_IPI)
115:
116: /*
117: * Software interrupt masks
118: */
119: #define splsoftclock() splraise(IPL_SOFTCLOCK)
120: #define splsoftnet() splraise(IPL_SOFTNET)
121: #define splsofttty() splraise(IPL_SOFTTTY)
122:
123: /*
124: * Miscellaneous
125: */
126: #define splvm() splraise(IPL_VM)
127: #define splhigh() splraise(IPL_HIGH)
128: #define splsched() splraise(IPL_SCHED)
129: #define spllock() splhigh()
130: #define spl0() spllower(IPL_NONE)
131:
132: #define setsoftclock() softintr(1 << SIR_CLOCK, IPL_SOFTCLOCK)
133: #define setsoftnet() softintr(1 << SIR_NET, IPL_SOFTNET)
134: #define setsofttty() softintr(1 << SIR_TTY, IPL_SOFTTTY)
135:
136: struct cpu_info;
137:
138: #ifdef MULTIPROCESSOR
139: int i386_send_ipi(struct cpu_info *, int);
140: int i386_fast_ipi(struct cpu_info *, int);
141: void i386_broadcast_ipi(int);
142: void i386_multicast_ipi(int, int);
143: void i386_ipi_handler(void);
144: void i386_ipi_microset(struct cpu_info *);
145: void i386_intlock(int);
146: void i386_intunlock(int);
147: void i386_softintlock(void);
148: void i386_softintunlock(void);
149: void i386_setperf_ipi(struct cpu_info *);
150:
151: extern void (*ipifunc[I386_NIPI])(struct cpu_info *);
152: #endif
153:
154: #endif /* !_LOCORE */
155:
156: #endif /* !_I386_INTR_H_ */
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to intr.h CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / arch / i386 / include