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Annotation of sys/arch/i386/include/i82093reg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: i82093reg.h,v 1.3 2004/06/23 17:14:31 niklas Exp $    */
                      2: /* $NetBSD: i82093reg.h,v 1.1.2.2 2000/02/21 18:54:07 sommerfeld Exp $ */
                      3:
                      4: /*-
                      5:  * Copyright (c) 2000 The NetBSD Foundation, Inc.
                      6:  * All rights reserved.
                      7:  *
                      8:  * This code is derived from software contributed to The NetBSD Foundation
                      9:  * by RedBack Networks Inc.
                     10:  *
                     11:  * Author: Bill Sommerfeld
                     12:  *
                     13:  * Redistribution and use in source and binary forms, with or without
                     14:  * modification, are permitted provided that the following conditions
                     15:  * are met:
                     16:  * 1. Redistributions of source code must retain the above copyright
                     17:  *    notice, this list of conditions and the following disclaimer.
                     18:  * 2. Redistributions in binary form must reproduce the above copyright
                     19:  *    notice, this list of conditions and the following disclaimer in the
                     20:  *    documentation and/or other materials provided with the distribution.
                     21:  * 3. All advertising materials mentioning features or use of this software
                     22:  *    must display the following acknowledgement:
                     23:  *        This product includes software developed by the NetBSD
                     24:  *        Foundation, Inc. and its contributors.
                     25:  * 4. Neither the name of The NetBSD Foundation nor the names of its
                     26:  *    contributors may be used to endorse or promote products derived
                     27:  *    from this software without specific prior written permission.
                     28:  *
                     29:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
                     30:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     31:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     32:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
                     33:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     34:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     35:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     36:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     37:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     38:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     39:  * POSSIBILITY OF SUCH DAMAGE.
                     40:  */
                     41:
                     42: /*
                     43:  * Typically, the first apic lives here.
                     44:  */
                     45: #define IOAPIC_BASE_DEFAULT    0xfec00000
                     46:
                     47: /*
                     48:  * Memory-space registers.
                     49:  */
                     50:
                     51: /*
                     52:  * The externally visible registers are all 32 bits wide;
                     53:  * store the register number of interest in IOAPIC_REG, and store/fetch
                     54:  * the real value in IOAPIC_DATA.
                     55:  */
                     56: #define        IOAPIC_REG              0x0000
                     57: #define IOAPIC_DATA            0x0010
                     58:
                     59: /*
                     60:  * Internal I/O APIC registers.
                     61:  */
                     62:
                     63: #define IOAPIC_ID              0x00
                     64:
                     65: #define        IOAPIC_ID_SHIFT         24
                     66: #define                IOAPIC_ID_MASK          0x0f000000
                     67: #define                IOAPIC_ID_MAX           \
                     68:     ((IOAPIC_ID_MASK >> IOAPIC_ID_SHIFT) + 1)
                     69:
                     70: /* Version, and maximum interrupt pin number. */
                     71:
                     72: #define IOAPIC_VER             0x01
                     73:
                     74: #define                IOAPIC_VER_SHIFT                0
                     75: #define                IOAPIC_VER_MASK                 0x000000ff
                     76:
                     77: #define                IOAPIC_MAX_SHIFT                16
                     78: #define                IOAPIC_MAX_MASK         0x00ff0000
                     79:
                     80: /*
                     81:  * Arbitration ID.  Same format as IOAPIC_ID register.
                     82:  */
                     83: #define IOAPIC_ARB             0x02
                     84:
                     85: /*
                     86:  * Redirection table registers.
                     87:  */
                     88:
                     89: #define IOAPIC_REDHI(pin)      (0x11 + ((pin)<<1))
                     90: #define IOAPIC_REDLO(pin)      (0x10 + ((pin)<<1))
                     91:
                     92: #define IOAPIC_REDHI_DEST_SHIFT                24         /* destination. */
                     93: #define IOAPIC_REDHI_DEST_MASK         0xff000000
                     94:
                     95: #define IOAPIC_REDLO_MASK              0x00010000 /* 0=enabled; 1=masked */
                     96:
                     97: #define IOAPIC_REDLO_LEVEL             0x00008000 /* 0=edge, 1=level */
                     98: #define IOAPIC_REDLO_RIRR              0x00004000 /* remote IRR; read only */
                     99: #define IOAPIC_REDLO_ACTLO             0x00002000 /* 0=act. hi; 1=act. lo */
                    100: #define IOAPIC_REDLO_DELSTS            0x00001000 /* 0=idle; 1=send pending */
                    101: #define IOAPIC_REDLO_DSTMOD            0x00000800 /* 0=physical; 1=logical */
                    102:
                    103: #define IOAPIC_REDLO_DEL_MASK          0x00000700 /* del. mode mask */
                    104: #define IOAPIC_REDLO_DEL_SHIFT         8
                    105:
                    106: #define IOAPIC_REDLO_DEL_FIXED         0
                    107: #define IOAPIC_REDLO_DEL_LOPRI         1
                    108: #define IOAPIC_REDLO_DEL_SMI           2
                    109: #define IOAPIC_REDLO_DEL_NMI           4
                    110: #define IOAPIC_REDLO_DEL_INIT          5
                    111: #define IOAPIC_REDLO_DEL_EXTINT                7
                    112:
                    113: #define IOAPIC_REDLO_VECTOR_MASK       0x000000ff /* delivery vector */
                    114:
                    115: #define IMCR_ADDR              0x22
                    116: #define IMCR_DATA              0x23
                    117:
                    118: #define IMCR_REGISTER          0x70
                    119: #define                IMCR_PIC        0x00
                    120: #define        IMCR_APIC       0x01
                    121:
                    122: #define ioapic_asm_ack(num) \
                    123:     movl       $0,_C_LABEL(local_apic) + LAPIC_EOI