Annotation of sys/arch/hppa64/include/trap.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: trap.h,v 1.1 2005/04/01 10:40:48 mickey Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 2005 Michael Shalayeff
! 5: * All rights reserved.
! 6: *
! 7: * Permission to use, copy, modify, and distribute this software for any
! 8: * purpose with or without fee is hereby granted, provided that the above
! 9: * copyright notice and this permission notice appear in all copies.
! 10: *
! 11: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
! 12: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
! 13: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
! 14: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
! 15: * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
! 16: * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
! 17: * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
! 18: */
! 19:
! 20: #ifndef _MACHINE_TRAP_H_
! 21: #define _MACHINE_TRAP_H_
! 22:
! 23: /*
! 24: * This is PA-RISC trap types per 1.1 specs, see .c files for references.
! 25: */
! 26: #define T_NONEXIST 0 /* invalid interrupt vector */
! 27: #define T_HPMC 1 /* high priority machine check */
! 28: #define T_POWERFAIL 2 /* power failure */
! 29: #define T_RECOVERY 3 /* recovery counter */
! 30: #define T_INTERRUPT 4 /* external interrupt */
! 31: #define T_LPMC 5 /* low-priority machine check */
! 32: #define T_ITLBMISS 6 /* instruction TLB miss fault */
! 33: #define T_IPROT 7 /* instruction protection */
! 34: #define T_ILLEGAL 8 /* Illegal instruction */
! 35: #define T_IBREAK 9 /* break instruction */
! 36: #define T_PRIV_OP 10 /* privileged operation */
! 37: #define T_PRIV_REG 11 /* privileged register */
! 38: #define T_OVERFLOW 12 /* overflow */
! 39: #define T_CONDITION 13 /* conditional */
! 40: #define T_EXCEPTION 14 /* assist exception */
! 41: #define T_DTLBMISS 15 /* data TLB miss */
! 42: #define T_ITLBMISSNA 16 /* ITLB non-access miss */
! 43: #define T_DTLBMISSNA 17 /* DTLB non-access miss */
! 44: #define T_DPROT 18 /* data protection/rights/alignment <7100 */
! 45: #define T_DBREAK 19 /* data break */
! 46: #define T_TLB_DIRTY 20 /* TLB dirty bit */
! 47: #define T_PAGEREF 21 /* page reference */
! 48: #define T_EMULATION 22 /* assist emulation */
! 49: #define T_HIGHERPL 23 /* higher-privelege transfer */
! 50: #define T_LOWERPL 24 /* lower-privilege transfer */
! 51: #define T_TAKENBR 25 /* taken branch */
! 52: #define T_DATACC 26 /* data access rights >=7100 */
! 53: #define T_DATAPID 27 /* data protection ID >=7100 */
! 54: #define T_DATALIGN 28 /* unaligned data ref */
! 55: #define T_PERFMON 29 /* performance monitor interrupt */
! 56: #define T_IDEBUG 30 /* debug SFU interrupt */
! 57: #define T_DDEBUG 31 /* debug SFU interrupt */
! 58:
! 59: /*
! 60: * Reserved range for traps is 0-63, place user flag at 6th bit
! 61: */
! 62: #define T_USER_POS 57
! 63: #define T_USER (1 << (63 - T_USER_POS))
! 64:
! 65: /*
! 66: * Various trap frame flags.
! 67: */
! 68: #define TFF_LAST_POS 40
! 69: #define TFF_SYS_POS 41
! 70: #define TFF_INTR_POS 42
! 71:
! 72: #define TFF_LAST (1 << (63 - TFF_LAST_POS))
! 73: #define TFF_SYS (1 << (63 - TFF_SYS_POS))
! 74: #define TFF_INTR (1 << (63 - TFF_INTR_POS))
! 75:
! 76: /*
! 77: * Define this for pretty printings of trapflags.
! 78: */
! 79: #define T_BITS "\020\07user\036intr\037itlb\040last"
! 80:
! 81: /*
! 82: * These are break instruction entry points.
! 83: */
! 84: /* im5 */
! 85: #define HPPA_BREAK_KERNEL 0
! 86: /* im13 */
! 87: #define HPPA_BREAK_KGDB 5
! 88: #define HPPA_BREAK_GET_PSW 9
! 89: #define HPPA_BREAK_SET_PSW 10
! 90:
! 91: #endif /* _MACHINE_TRAP_H_ */
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