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Annotation of sys/arch/hppa64/include/psl.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: psl.h,v 1.1 2005/04/01 10:40:48 mickey Exp $  */
                      2:
                      3: /*
                      4:  * Copyright (c) 2005 Michael Shalayeff
                      5:  * All rights reserved.
                      6:  *
                      7:  * Permission to use, copy, modify, and distribute this software for any
                      8:  * purpose with or without fee is hereby granted, provided that the above
                      9:  * copyright notice and this permission notice appear in all copies.
                     10:  *
                     11:  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
                     12:  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
                     13:  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
                     14:  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
                     15:  * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
                     16:  * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
                     17:  * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
                     18:  */
                     19:
                     20: #ifndef _MACHINE_PSL_H_
                     21: #define _MACHINE_PSL_H_
                     22:
                     23: /*
                     24:  * Rference:
                     25:  * 1. PA-RISC 1.1 Architecture and Instruction Set Manual
                     26:  *    Hewlett Packard, 3rd Edition, February 1994; Part Number 09740-90039
                     27:  */
                     28:
                     29: /*
                     30:  * Processor Status Word Bit Positions (in PA-RISC bit order)
                     31:  */
                     32: #define        PSL_Y_POS       (0)
                     33: #define        PSL_Z_POS       (1)
                     34: #define        PSL_W_POS       (4)
                     35: #define        PSL_E_POS       (5)
                     36: #define        PSL_S_POS       (6)
                     37: #define        PSL_T_POS       (7)
                     38: #define        PSL_H_POS       (8)
                     39: #define        PSL_L_POS       (9)
                     40: #define        PSL_N_POS       (10)
                     41: #define        PSL_X_POS       (11)
                     42: #define        PSL_B_POS       (12)
                     43: #define        PSL_C_POS       (13)
                     44: #define        PSL_V_POS       (14)
                     45: #define        PSL_M_POS       (15)
                     46: #define        PSL_CB_POS      (16)
                     47: #define        PSL_O_POS       (24)
                     48: #define        PSL_G_POS       (25)
                     49: #define        PSL_F_POS       (26)
                     50: #define        PSL_R_POS       (27)
                     51: #define        PSL_Q_POS       (28)
                     52: #define        PSL_P_POS       (29)
                     53: #define        PSL_D_POS       (30)
                     54: #define        PSL_I_POS       (31)
                     55:
                     56: #define        PSL_BITS        "\020\001I\002D\003P\004Q\005R\006F\007G\010O"  \
                     57:                        "\021M\022V\023C\024B\025X\026N\027L\030H" \
                     58:                        "\031T\032S\033E\034W\037Z\040Y"
                     59:
                     60: /*
                     61:  * Processor Status Word Bit Values
                     62:  */
                     63: #define        PSL_Y   (1 << (31-PSL_Y_POS))   /* Data Debug Trap Disable */
                     64: #define        PSL_Z   (1 << (31-PSL_Z_POS))   /* Instruction Debug Trap Disable */
                     65: #define        PSL_W   (1 << (31-PSL_W_POS))   /* 64bit address decode enable */
                     66: #define        PSL_E   (1 << (31-PSL_E_POS))   /* Little Endian Memory Access Enable */
                     67: #define        PSL_S   (1 << (31-PSL_S_POS))   /* Secure Interval Timer */
                     68: #define        PSL_T   (1 << (31-PSL_T_POS))   /* Taken Branch Trap Enable */
                     69: #define        PSL_H   (1 << (31-PSL_H_POS))   /* Higher-privilege xfer Trap Enable */
                     70: #define        PSL_L   (1 << (31-PSL_L_POS))   /* Lower-privilege xfer Trap Enable */
                     71: #define        PSL_N   (1 << (31-PSL_N_POS))   /* Nullify */
                     72: #define        PSL_X   (1 << (31-PSL_X_POS))   /* Data Memory Break Disable */
                     73: #define        PSL_B   (1 << (31-PSL_B_POS))   /* Taken Branch */
                     74: #define        PSL_C   (1 << (31-PSL_C_POS))   /* Instruction Address Translation */
                     75: #define        PSL_V   (1 << (31-PSL_V_POS))   /* Divide Step Correction */
                     76: #define        PSL_M   (1 << (31-PSL_M_POS))   /* High-priority Machine Check Mask */
                     77: #define        PSL_CB  (1 << (31-PSL_CB_POS))  /* Carry/Borrow Bits */
                     78: #define        PSL_O   (1 << (31-PSL_O_POS))   /* Force strong ordering (2.0) */
                     79: #define        PSL_G   (1 << (31-PSL_G_POS))   /* Debug Trap Enable */
                     80: #define        PSL_F   (1 << (31-PSL_F_POS))   /* Perfomance Monitor Interrupt */
                     81: #define        PSL_R   (1 << (31-PSL_R_POS))   /* Recover Counter Enable */
                     82: #define        PSL_Q   (1 << (31-PSL_Q_POS))   /* Interrupt State Collection Enable */
                     83: #define        PSL_P   (1 << (31-PSL_P_POS))   /* Protection Identifier Validation */
                     84: #define        PSL_D   (1 << (31-PSL_D_POS))   /* Data Address Translation Enable */
                     85: #define        PSL_I   (1 << (31-PSL_I_POS))   /* External Interrupt, Power Failure
                     86:                                           Interrupt, and Low-Priority Machine
                     87:                                           Check Interrupt unmask */
                     88:
                     89: /*
                     90:  * Frequently Used PSW Values
                     91:  */
                     92: #define        RESET_PSL       (PSL_R | PSL_Q | PSL_P | PSL_D | PSL_I)
                     93:
                     94: #endif  /* _MACHINE_PSL_H_ */