Annotation of sys/arch/hppa64/include/cpu.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: cpu.h,v 1.11 2007/05/16 19:37:06 thib Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 2005 Michael Shalayeff
! 5: * All rights reserved.
! 6: *
! 7: * Permission to use, copy, modify, and distribute this software for any
! 8: * purpose with or without fee is hereby granted, provided that the above
! 9: * copyright notice and this permission notice appear in all copies.
! 10: *
! 11: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
! 12: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
! 13: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
! 14: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
! 15: * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
! 16: * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
! 17: * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
! 18: */
! 19: /*
! 20: * Copyright (c) 1988-1994, The University of Utah and
! 21: * the Computer Systems Laboratory at the University of Utah (CSL).
! 22: * All rights reserved.
! 23: *
! 24: * Permission to use, copy, modify and distribute this software is hereby
! 25: * granted provided that (1) source code retains these copyright, permission,
! 26: * and disclaimer notices, and (2) redistributions including binaries
! 27: * reproduce the notices in supporting documentation, and (3) all advertising
! 28: * materials mentioning features or use of this software display the following
! 29: * acknowledgement: ``This product includes software developed by the
! 30: * Computer Systems Laboratory at the University of Utah.''
! 31: *
! 32: * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
! 33: * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
! 34: * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
! 35: *
! 36: * CSL requests users of this software to return to csl-dist@cs.utah.edu any
! 37: * improvements that they make and grant CSL redistribution rights.
! 38: *
! 39: * Utah $Hdr: cpu.h 1.19 94/12/16$
! 40: */
! 41:
! 42: #ifndef _MACHINE_CPU_H_
! 43: #define _MACHINE_CPU_H_
! 44:
! 45: #include <machine/trap.h>
! 46: #include <machine/frame.h>
! 47:
! 48: /*
! 49: * COPR/SFUs
! 50: */
! 51: #define HPPA_FPUS 0xc0
! 52: #define HPPA_FPUVER(w) (((w) & 0x003ff800) >> 11)
! 53: #define HPPA_FPU_OP(w) ((w) >> 26)
! 54: #define HPPA_FPU_UNMPL 0x01 /* exception reg, the rest is << 1 */
! 55: #define HPPA_FPU_ILL 0x80 /* software-only */
! 56: #define HPPA_FPU_I 0x01
! 57: #define HPPA_FPU_U 0x02
! 58: #define HPPA_FPU_O 0x04
! 59: #define HPPA_FPU_Z 0x08
! 60: #define HPPA_FPU_V 0x10
! 61: #define HPPA_FPU_D 0x20
! 62: #define HPPA_FPU_T 0x40
! 63: #define HPPA_FPU_XMASK 0x7f
! 64: #define HPPA_FPU_T_POS 25 /* 32bit reg! */
! 65: #define HPPA_FPU_RM 0x00000600
! 66: #define HPPA_FPU_CQ 0x00fff800
! 67: #define HPPA_FPU_C 0x04000000
! 68: #define HPPA_FPU_FLSH 27
! 69: #define HPPA_FPU_INIT (0)
! 70: #define HPPA_FPU_FORK(s) ((s) & ~((u_int64_t)(HPPA_FPU_XMASK)<<32))
! 71: #define HPPA_PMSFUS 0x20 /* ??? */
! 72:
! 73: /*
! 74: * Interrupts stuff
! 75: */
! 76: #define IPL_NONE 0
! 77: #define IPL_SOFTCLOCK 1
! 78: #define IPL_SOFTNET 2
! 79: #define IPL_BIO 3
! 80: #define IPL_NET 4
! 81: #define IPL_SOFTTTY 5
! 82: #define IPL_TTY 6
! 83: #define IPL_VM 7
! 84: #define IPL_AUDIO 8
! 85: #define IPL_CLOCK 9
! 86: #define IPL_STATCLOCK 10
! 87: #define IPL_SCHED IPL_STATCLOCK
! 88: #define IPL_HIGH 11
! 89:
! 90: #define NIPL 12
! 91:
! 92: #define IST_NONE 0
! 93: #define IST_PULSE 1
! 94: #define IST_EDGE 2
! 95: #define IST_LEVEL 3
! 96:
! 97: #define splsoftclock() splraise(IPL_SOFTCLOCK)
! 98: #define splsoftnet() splraise(IPL_SOFTNET)
! 99: #define splbio() splraise(IPL_BIO)
! 100: #define splnet() splraise(IPL_NET)
! 101: #define splsofttty() splraise(IPL_SOFTTTY)
! 102: #define spltty() splraise(IPL_TTY)
! 103: #define splvm() splraise(IPL_VM)
! 104: #define splaudio() splraise(IPL_AUDIO)
! 105: #define splclock() splraise(IPL_CLOCK)
! 106: #define splsched() splraise(IPL_SCHED)
! 107: #define splstatclock() splraise(IPL_STATCLOCK)
! 108: #define splhigh() splraise(IPL_HIGH)
! 109: #define spl0() spllower(IPL_NONE)
! 110: #define splx(c) spllower(c)
! 111:
! 112: #define setsoftast() (astpending = 1)
! 113: #define setsoftclock() /* TODO */
! 114: #define setsoftnet() /* TODO */
! 115: #define setsofttty() /* TODO */
! 116:
! 117: #ifndef _LOCORE
! 118: #include <sys/time.h>
! 119: #include <sys/sched.h>
! 120:
! 121: struct cpu_info {
! 122: struct proc *ci_curproc;
! 123: struct pcb *ci_cpcb;
! 124: struct cpu_info *ci_next;
! 125:
! 126: struct proc *ci_fpproc;
! 127: int ci_number;
! 128: struct schedstate_percpu ci_schedstate; /* scheduler state */
! 129:
! 130: /* DEBUG/DIAGNOSTIC stuff */
! 131: u_long ci_spin_locks; /* # of spin locks held */
! 132: u_long ci_simple_locks;/* # of simple locks held */
! 133:
! 134: /* Spinning up the CPU */
! 135: void (*ci_spinup)(void); /* spinup routine */
! 136: void *ci_initstack;
! 137: };
! 138:
! 139: struct cpu_info *curcpu(void);
! 140: #define cpu_number() (curcpu()->ci_number)
! 141: #define CPU_IS_PRIMARY(ci) ((ci)->ci_number == 0)
! 142: #define CPU_INFO_ITERATOR int
! 143: #define CPU_INFO_FOREACH(cii,ci) \
! 144: for (cii = 0, ci = curcpu(); ci != NULL; ci = ci->ci_next)
! 145: #define CPU_INFO_UNIT(ci) ((ci)->ci_number)
! 146:
! 147: #ifdef DIAGNOSTIC
! 148: void splassert_fail(int, int, const char *);
! 149: extern int splassert_ctl;
! 150: void splassert_check(int, const char *);
! 151: #define splassert(__wantipl) do { \
! 152: if (splassert_ctl > 0) { \
! 153: splassert_check(__wantipl, __func__); \
! 154: } \
! 155: } while (0)
! 156: #else
! 157: #define splassert(__wantipl) do { /* nada */ } while (0)
! 158: #endif /* DIAGNOSTIC */
! 159:
! 160: /* types */
! 161: enum hppa_cpu_type {
! 162: hpcxu, hpcxu2, hpcxw
! 163: };
! 164: extern enum hppa_cpu_type cpu_type;
! 165: extern const char *cpu_typename;
! 166: extern int cpu_hvers;
! 167: #endif
! 168:
! 169: /*
! 170: * Exported definitions unique to hp700/PA-RISC cpu support.
! 171: */
! 172:
! 173: #define HPPA_PGALIAS 0x0000000000100000UL
! 174: #define HPPA_PGAMASK 0xfffffffffff00000UL
! 175: #define HPPA_PGAOFF 0x00000000000fffffUL
! 176:
! 177: #define HPPA_PHYSMAP 0x000001ffffffffffUL
! 178: #define HPPA_IOBEGIN 0xfffffff000000000UL
! 179: #define HPPA_IOLEN 0x0000001000000000UL
! 180: #define HPPA_PHYSEND 0xffffffffffffffffUL
! 181: #define HPPA_IOADDR 0xfffffff100000000UL
! 182: #define HPPA_IOBCAST 0xfffffffffffc0000UL
! 183: #define HPPA_LBCAST 0xfffffffffffc0000UL
! 184: #define HPPA_GBCAST 0xfffffffffffe0000UL
! 185: #define HPPA_FPADDR 0xfffffffffff80000UL
! 186: #define HPPA_FLEX_MASK 0xfffffffffffc0000UL
! 187: #define HPPA_DMA_ENABLE 0x00000001
! 188: #define HPPA_SPA_ENABLE 0x00000020
! 189: #define HPPA_NMODSPBUS 64
! 190:
! 191: #define clockframe trapframe
! 192: #define CLKF_PC(framep) ((framep)->tf_iioq[0])
! 193: #define CLKF_INTR(framep) ((framep)->tf_flags & TFF_INTR)
! 194: #define CLKF_USERMODE(framep) ((framep)->tf_flags & T_USER)
! 195: #define CLKF_SYSCALL(framep) ((framep)->tf_flags & TFF_SYS)
! 196:
! 197: #define signotify(p) (setsoftast())
! 198: #define need_resched(ci) (want_resched = 1, setsoftast())
! 199: #define need_proftick(p) setsoftast()
! 200:
! 201: #ifndef _LOCORE
! 202: #ifdef _KERNEL
! 203:
! 204: extern int want_resched, astpending;
! 205:
! 206: #define DELAY(x) delay(x)
! 207:
! 208: int splraise(int cpl);
! 209: int spllower(int cpl);
! 210:
! 211: void delay(u_int us);
! 212: void hppa_init(paddr_t start);
! 213: void trap(int type, struct trapframe *frame);
! 214: int spcopy(pa_space_t ssp, const void *src,
! 215: pa_space_t dsp, void *dst, size_t size);
! 216: int spstrcpy(pa_space_t ssp, const void *src,
! 217: pa_space_t dsp, void *dst, size_t size, size_t *rsize);
! 218: int copy_on_fault(void);
! 219: void switch_trampoline(void);
! 220: int cpu_dumpsize(void);
! 221: int cpu_dump(void);
! 222:
! 223: #ifdef USELEDS
! 224: #define PALED_NETSND 0x01
! 225: #define PALED_NETRCV 0x02
! 226: #define PALED_DISK 0x04
! 227: #define PALED_HEARTBEAT 0x08
! 228: #define PALED_LOADMASK 0xf0
! 229:
! 230: #define PALED_DATA 0x01
! 231: #define PALED_STROBE 0x02
! 232:
! 233: extern volatile u_int8_t *machine_ledaddr;
! 234: extern int machine_ledword, machine_leds;
! 235:
! 236: static __inline void
! 237: ledctl(int on, int off, int toggle)
! 238: {
! 239: if (machine_ledaddr) {
! 240: int r;
! 241:
! 242: if (on)
! 243: machine_leds |= on;
! 244: if (off)
! 245: machine_leds &= ~off;
! 246: if (toggle)
! 247: machine_leds ^= toggle;
! 248:
! 249: r = ~machine_leds; /* it seems they should be reversed */
! 250:
! 251: if (machine_ledword)
! 252: *machine_ledaddr = r;
! 253: else {
! 254: register int b;
! 255: for (b = 0x80; b; b >>= 1) {
! 256: *machine_ledaddr = (r & b)? PALED_DATA : 0;
! 257: DELAY(1);
! 258: *machine_ledaddr = ((r & b)? PALED_DATA : 0) |
! 259: PALED_STROBE;
! 260: }
! 261: }
! 262: }
! 263: }
! 264: #endif
! 265:
! 266: void fpu_save(vaddr_t va);
! 267: void fpu_exit(void);
! 268: void ficache(pa_space_t sp, vaddr_t va, vsize_t size);
! 269: void fdcache(pa_space_t sp, vaddr_t va, vsize_t size);
! 270: void pdcache(pa_space_t sp, vaddr_t va, vsize_t size);
! 271: void ficacheall(void);
! 272: void fdcacheall(void);
! 273: void pitlb(pa_space_t sp, vaddr_t va);
! 274: void pdtlb(pa_space_t sp, vaddr_t va);
! 275: void ptlball(void);
! 276: void mtctl(register_t val, int reg);
! 277: register_t mfctl(int reg);
! 278: hppa_hpa_t cpu_gethpa(int n);
! 279: void sync_caches(void);
! 280: #endif
! 281:
! 282: /*
! 283: * Boot arguments stuff
! 284: */
! 285:
! 286: #define BOOTARG_LEN (NBPG)
! 287: #define BOOTARG_OFF (0x10000)
! 288:
! 289: /*
! 290: * CTL_MACHDEP definitions.
! 291: */
! 292: #define CPU_CONSDEV 1 /* dev_t: console terminal device */
! 293: #define CPU_MAXID 1 /* number of valid machdep ids */
! 294:
! 295: #define CTL_MACHDEP_NAMES { \
! 296: { 0, 0 }, \
! 297: { "console_device", CTLTYPE_STRUCT }, \
! 298: }
! 299: #endif
! 300:
! 301: #endif /* _MACHINE_CPU_H_ */
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