Annotation of sys/arch/hppa64/hppa64/process_machdep.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: process_machdep.c,v 1.1 2005/04/01 10:40:47 mickey Exp $ */
2:
3: /*
4: * Copyright (c) 2005 Michael Shalayeff
5: * All rights reserved.
6: *
7: * Permission to use, copy, modify, and distribute this software for any
8: * purpose with or without fee is hereby granted, provided that the above
9: * copyright notice and this permission notice appear in all copies.
10: *
11: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15: * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
16: * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
17: * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18: */
19:
20:
21: #include <sys/param.h>
22: #include <sys/systm.h>
23: #include <sys/proc.h>
24: #include <sys/ptrace.h>
25: #include <sys/user.h>
26:
27: int
28: process_read_regs(p, regs)
29: struct proc *p;
30: struct reg *regs;
31: {
32: struct trapframe *tf = p->p_md.md_regs;
33:
34: regs->r_regs[0] = tf->tf_sar;
35: bcopy(&tf->tf_r1, ®s->r_regs[1], 31*8);
36: regs->r_pc = tf->tf_iioq[0];
37: regs->r_npc = tf->tf_iioq[1];
38:
39: return (0);
40: }
41:
42: int
43: process_read_fpregs(p, fpregs)
44: struct proc *p;
45: struct fpreg *fpregs;
46: {
47: extern paddr_t fpu_curpcb;
48: extern u_int fpu_enable;
49:
50: if (p->p_md.md_regs->tf_cr30 == fpu_curpcb) {
51: mtctl(fpu_enable, CR_CCR);
52: fpu_save((vaddr_t)p->p_addr->u_pcb.pcb_fpregs);
53: mtctl(0, CR_CCR);
54: }
55: bcopy(p->p_addr->u_pcb.pcb_fpregs, fpregs, 32*8);
56:
57: return (0);
58: }
59:
60: #ifdef PTRACE
61:
62: int
63: process_write_regs(p, regs)
64: struct proc *p;
65: struct reg *regs;
66: {
67: struct trapframe *tf = p->p_md.md_regs;
68:
69: tf->tf_sar = regs->r_regs[0];
70: bcopy(®s->r_regs[1], &tf->tf_r1, 31*8);
71: tf->tf_iioq[0] = regs->r_pc | 3;
72: tf->tf_iioq[1] = regs->r_npc | 3;
73:
74: return (0);
75: }
76:
77: int
78: process_write_fpregs(p, fpregs)
79: struct proc *p;
80: struct fpreg *fpregs;
81: {
82: extern paddr_t fpu_curpcb;
83:
84: if (p->p_md.md_regs->tf_cr30 == fpu_curpcb) {
85: fpu_exit();
86: fpu_curpcb = 0;
87: }
88:
89: bcopy(fpregs, p->p_addr->u_pcb.pcb_fpregs, 32 * 8);
90:
91: return (0);
92: }
93:
94: int
95: process_sstep(p, sstep)
96: struct proc *p;
97: int sstep;
98: {
99: if (sstep)
100: return (EINVAL);
101:
102: return (0);
103: }
104:
105: int
106: process_set_pc(p, addr)
107: struct proc *p;
108: caddr_t addr;
109: {
110: p->p_md.md_regs->tf_iioq[1] = 4 +
111: (p->p_md.md_regs->tf_iioq[0] = (register_t)addr | 3);
112:
113: return (0);
114: }
115:
116: #endif /* PTRACE */
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