Annotation of sys/arch/hppa64/hppa64/db_disasm.c, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: db_disasm.c,v 1.2 2006/02/06 17:19:31 jmc Exp $ */
! 2:
! 3: /* TODO parse 64bit insns or rewrite */
! 4:
! 5: /*
! 6: * Copyright (c) 2005 Michael Shalayeff
! 7: * All rights reserved.
! 8: *
! 9: * Permission to use, copy, modify, and distribute this software for any
! 10: * purpose with or without fee is hereby granted, provided that the above
! 11: * copyright notice and this permission notice appear in all copies.
! 12: *
! 13: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
! 14: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
! 15: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
! 16: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
! 17: * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
! 18: * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
! 19: * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
! 20: */
! 21: /*
! 22: * (c) Copyright 1992 HEWLETT-PACKARD COMPANY
! 23: *
! 24: * To anyone who acknowledges that this file is provided "AS IS"
! 25: * without any express or implied warranty:
! 26: * permission to use, copy, modify, and distribute this file
! 27: * for any purpose is hereby granted without fee, provided that
! 28: * the above copyright notice and this notice appears in all
! 29: * copies, and that the name of Hewlett-Packard Company not be
! 30: * used in advertising or publicity pertaining to distribution
! 31: * of the software without specific, written prior permission.
! 32: * Hewlett-Packard Company makes no representations about the
! 33: * suitability of this software for any purpose.
! 34: */
! 35:
! 36: /*
! 37: * unasm.c -- HP_PA Instruction Printer
! 38: */
! 39:
! 40: #include <sys/param.h>
! 41: #include <sys/systm.h>
! 42:
! 43: #include <machine/db_machdep.h>
! 44: #include <ddb/db_access.h>
! 45: #include <ddb/db_sym.h>
! 46: #include <ddb/db_output.h>
! 47: #include <ddb/db_interface.h>
! 48:
! 49:
! 50: /* IMPORTANT NOTE:
! 51: * All modules using this header may assume that the datatype "int" is a
! 52: * 32-bit (or > 32-bit) signed quantity.
! 53: */
! 54:
! 55:
! 56: /* Spectrum Architecturally Defined Datatypes */
! 57: struct doubleword {
! 58: int wd0;
! 59: int wd1;
! 60: };
! 61:
! 62: struct quadword {
! 63: struct doubleword d0;
! 64: struct doubleword d1;
! 65: };
! 66:
! 67: /* datatypes for halfword and byte fields of a word are defined
! 68: * in ssBits.h */
! 69:
! 70: /* Memory addressing datatypes */
! 71: typedef unsigned int SID, /* range [0..MAXSID] */
! 72: PGID, /* range [0..MAXPGID] */
! 73: OFS, /* range [0..MAXINT] */
! 74: REALADR; /* range [0..MAXINT] */
! 75:
! 76:
! 77: /* data sizes */
! 78: enum datasize { Byte, Halfword, Word, Doubleword, Quadword, Variable };
! 79:
! 80: /* Miscellaneous datatypes */
! 81: typedef unsigned int FLAGS;
! 82:
! 83: /* struct for entry in unwind table */
! 84: struct ute {
! 85: int word1;
! 86: int word2;
! 87: int word3;
! 88: int word4;
! 89: };
! 90: /*
! 91: * Header: /n/schirf/u/baford/CVS/mach4-parisc/kernel_unused/parisc/kdb/unasm.c,v 1.5 1994/07/21 22:32:05 mike Exp
! 92: *
! 93: * Spectrum Instruction Set Condition Completer Bit Assignments
! 94: * Dan Magenheimer - 6/14/82
! 95: * Terrence Miller - 6/21/82
! 96: * Computer Research Center, Hewlett-Packard Labs
! 97: *
! 98: * (c) copyright 1982
! 99: * (p) protected 1982
! 100: * The Hewlett-Packard Company
! 101: * Hewlett-Packard Laboratories
! 102: * Computer Research Center
! 103: * Palo Alto, California
! 104: *
! 105: * *** HP Company Confidential ***
! 106: *
! 107: * Log: unasm.c,v
! 108: * Revision 1.5 1994/07/21 22:32:05 mike
! 109: * official HP copyright notice
! 110: *
! 111: * Revision 1.4 1992/07/08 12:19:52 dalton
! 112: * Checkin before split to 1.0.4 release (by LBS).
! 113: *
! 114: * Revision 1.3 92/06/06 16:16:45 dalton
! 115: * *** empty log message ***
! 116: *
! 117: * Revision 1.2 92/06/06 15:42:28 dalton
! 118: * Changed include to be a path relative to hp800.
! 119: *
! 120: * Revision 1.1 92/06/06 14:05:33 dalton
! 121: * Initial revision
! 122: *
! 123: * Revision 1.2 91/04/14 20:29:49 osfrcs
! 124: * Initial version.
! 125: * [91/03/30 09:20:34 brezak]
! 126: *
! 127: * Revision 1.1.2.2 91/04/02 10:42:50 brezak
! 128: * Initial version.
! 129: * [91/03/30 09:20:34 brezak]
! 130: *
! 131: * Revision 1.1.1.2 91/03/30 09:20:34 brezak
! 132: * Initial version.
! 133: *
! 134: * Revision 1.1 88/07/11 14:05:15 14:05:15 ren (Bob Naas)
! 135: * Initial revision
! 136: *
! 137: * Revision 5.2 87/07/02 14:45:57 14:45:57 kent (Kent McMullen)
! 138: * added constants to support addDasm and addDCond added to ssDID.c
! 139: *
! 140: * Revision 5.1 87/02/27 11:12:08 11:12:08 kent (Kent McMullen)
! 141: * update all src to 5.1
! 142: *
! 143: * Revision 5.0 87/02/18 16:31:15 16:31:15 kent (Kent McMullen)
! 144: * update all revision numbers to 5.0 for release
! 145: *
! 146: * Revision 1.1 86/07/15 08:34:55 08:34:55 kent (Kent McMullen)
! 147: * Initial revision
! 148: *
! 149: * Revision 4.1 83/10/25 17:01:22 17:01:22 djm (Daniel J Magenheimer)
! 150: * First release for ACD v4
! 151: *
! 152: * Revision 3.0 83/06/13 10:22:59 djm (Daniel Magenheimer)
! 153: * First release for distribution
! 154: *
! 155: *
! 156: */
! 157:
! 158:
! 159: /* Arithmetic/Logical Conditions */
! 160: #define NEV 0x0
! 161: #define EQZ 0x2
! 162: #define LT 0x4
! 163: #define LE 0x6
! 164: #define LLT 0x8
! 165: #define NUV 0x8
! 166: #define LLE 0xA
! 167: #define ZNV 0xA
! 168: #define SV 0xC
! 169: #define OD 0xE
! 170: #define TR 0x1
! 171: #define NEQZ 0x3
! 172: #define GE 0x5
! 173: #define GT 0x7
! 174: #define LGE 0x9
! 175: #define UV 0x9
! 176: #define LGT 0xB
! 177: #define VNZ 0xB
! 178: #define NSV 0xD
! 179: #define EV 0xF
! 180:
! 181: /* unit conditions */
! 182: #define SBZ 0x4
! 183: #define SHZ 0x6
! 184: #define SDC 0x8
! 185: #define SBC 0xC
! 186: #define SHC 0xE
! 187: #define NBZ 0x5
! 188: #define NHZ 0x7
! 189: #define NDC 0x9
! 190: #define NBC 0xD
! 191: #define NHC 0xF
! 192:
! 193: /*field conditions */
! 194: #define XEQ 0x1
! 195: #define XLT 0x2
! 196: #define XOD 0x3
! 197: #define XTR 0x4
! 198: #define XNE 0x5
! 199: #define XGE 0x6
! 200: #define XEV 0x7
! 201:
! 202:
! 203:
! 204: /*
! 205: * These macros are designed to be portable to all machines that have
! 206: * a wordsize greater than or equal to 32 bits that support the portable
! 207: * C compiler and the standard C preprocessor. Wordsize (default 32)
! 208: * and bitfield assignment (default left-to-right, unlike VAX, PDP-11)
! 209: * should be predefined using the constants HOSTWDSZ and BITFRL and
! 210: * the C compiler "-D" flag (e.g., -DHOSTWDSZ=36 -DBITFLR for the DEC-20).
! 211: * Note that the macro arguments assume that the integer being referenced
! 212: * is a 32-bit integer (right-justified on the 20) and that bit 0 is the
! 213: * most significant bit.
! 214: */
! 215:
! 216: #ifndef HOSTWDSZ
! 217: #define HOSTWDSZ 32
! 218: #endif
! 219:
! 220: #ifdef vax
! 221: #ifndef BITFLR
! 222: #define BITFRL
! 223: #endif
! 224: #else
! 225: #define BITFLR
! 226: #endif
! 227:
! 228: /*########################### Macros ######################################*/
! 229:
! 230: /*---------------------------------------------------------------------------
! 231: * DeclareBitfield$Reference - Declare a structure to be used to reference
! 232: * a specified bitfield within an integer (using BitfR, see below).
! 233: * The argument "n" must be an identifier name not used elsewhere in the
! 234: * program , "s" and "l" must (alas!) be constants. (Suggestion: if
! 235: * "s" == 2 and "l" == 8, use _b28 for "n".) The name "BITFLR" should
! 236: * be pre-defined if the compiler assigns bitfields from left-to-right.
! 237: * The resultant macro expansion defines a structure in which the bit field
! 238: * starting at position "s" with length "l" may be referenced by accessing
! 239: * member "n". [Note: The leftmost bits in a 36-bit word may be accessed
! 240: * by specifying -4 <= s < 0 on the DEC-20.]
! 241: *---------------------------------------------------------------------------*/
! 242:
! 243: #ifdef BITFRL
! 244: #define DeclBitfR(s,l,n) struct n { int:(HOSTWDSZ-(s)-(l)); unsigned n:l;};
! 245: #else
! 246: #define DeclBitfR(s,l,n) struct n { int:((s)+(HOSTWDSZ-32)); unsigned n:l;};
! 247: #endif
! 248:
! 249: /*---------------------------------------------------------------------------
! 250: * Bitfield$Reference - Reference a specified bitfield within an integer.
! 251: * The argument "i" must be an addressable variable (i.e., not a register
! 252: * variable or an expression... but see BitfX below), "n" must be an
! 253: * identifier name declared in a DeclBitfR invocation. The resultant
! 254: * macro expansion references the bit field in "i" described by the
! 255: * DeclBitfR invocation with the same name ("n"). BitfR may be used as
! 256: * an lvalue or an rvalue. (i.e., either side of an assignment statement)
! 257: * The "s" and "l" arguments are historical and are now unused. (They
! 258: * correspond to the "s" and "l" arguments in DeclBitfR)
! 259: * Translates to a single instruction on both the VAX and the DEC-20.
! 260: *---------------------------------------------------------------------------*/
! 261: #define BitfR(i,s,l,n) (((struct n *)&i)->n)
! 262:
! 263: /*---------------------------------------------------------------------------
! 264: * Bitfield$eXtract - Extract the specified field from an integer. Arguments
! 265: * are the same as for BitfR (except no "n"), however both "s" and "l" need
! 266: * no longer be constants. May only be used as an rvalue. Translates to
! 267: * two instructions on the VAX, three on the DEC-20.
! 268: *---------------------------------------------------------------------------*/
! 269:
! 270: #define BitfX(i,s,l) (((i) >> (32-(s)-(l))) & ((1 << (l)) - 1))
! 271:
! 272:
! 273: /*---------------------------------------------------------------------------
! 274: * Mask$32bits - Mask the low order 32 bits of passed word. No-op on 32
! 275: * bit machines.
! 276: *---------------------------------------------------------------------------*/
! 277:
! 278: #if HOSTWDSZ > 32
! 279: #define Mask32(x) ((x) & 0xffffffff)
! 280: #else
! 281: #define Mask32(x) (x)
! 282: #endif
! 283:
! 284:
! 285: /*---------------------------------------------------------------------------
! 286: * SignExtend$32bits - Force the high-order bits in machines with wordsize
! 287: * longer than 32 to match bit 0.
! 288: *---------------------------------------------------------------------------*/
! 289:
! 290: #if HOSTWDSZ > 32
! 291: #define SignEx32(x) (((x) & 0x80000000) ? ((x) | ((unsigned)-1 << 32)) \
! 292: : Mask32(x))
! 293: #else
! 294: #define SignEx32(x) (x)
! 295: #endif
! 296:
! 297: /**************************/
! 298: /* bit field declarations */
! 299: /**************************/
! 300:
! 301: /* since the compiler complains if a structure name is declared twice, even
! 302: * if the declarations are identical, all DeclBitfR invocations are
! 303: * given here in one file. */
! 304:
! 305: DeclBitfR(0,1,_b01)
! 306: DeclBitfR(0,15,_b015)
! 307: DeclBitfR(0,16,_b016)
! 308: DeclBitfR(0,4,_b04)
! 309: DeclBitfR(0,6,_b06)
! 310: DeclBitfR(0,8,_b08)
! 311: DeclBitfR(4,1,_b41)
! 312: DeclBitfR(4,4,_b44)
! 313: DeclBitfR(6,1,_b61)
! 314: DeclBitfR(6,13,_b613)
! 315: DeclBitfR(6,15,_b615)
! 316: DeclBitfR(6,17,_b617)
! 317: DeclBitfR(6,26,_b626)
! 318: DeclBitfR(6,5,_b65)
! 319: DeclBitfR(7,1,_b71)
! 320: DeclBitfR(8,1,_b81)
! 321: DeclBitfR(8,4,_b84)
! 322: DeclBitfR(8,8,_b88)
! 323: DeclBitfR(9,1,_b91)
! 324: DeclBitfR(10,1,_b101)
! 325: DeclBitfR(11,1,_b111)
! 326: DeclBitfR(11,10,_b1110)
! 327: DeclBitfR(11,4,_b114)
! 328: DeclBitfR(11,5,_b115)
! 329: DeclBitfR(12,1,_b121)
! 330: DeclBitfR(12,4,_b124)
! 331: DeclBitfR(13,1,_b131)
! 332: DeclBitfR(14,1,_b141)
! 333: DeclBitfR(15,1,_b151)
! 334: DeclBitfR(16,1,_b161)
! 335: DeclBitfR(16,15,_b1615)
! 336: DeclBitfR(16,16,_b1616)
! 337: DeclBitfR(16,2,_b162)
! 338: DeclBitfR(16,3,_b163)
! 339: DeclBitfR(16,4,_b164)
! 340: DeclBitfR(16,5,_b165)
! 341: DeclBitfR(16,8,_b168)
! 342: DeclBitfR(17,1,_b171)
! 343: DeclBitfR(18,1,_b181)
! 344: DeclBitfR(18,13,_b1813)
! 345: DeclBitfR(18,2,_b182)
! 346: DeclBitfR(18,7,_b187)
! 347: DeclBitfR(19,1,_b191)
! 348: DeclBitfR(19,8,_b198)
! 349: DeclBitfR(19,10,_b1910)
! 350: DeclBitfR(20,11,_b2011)
! 351: DeclBitfR(20,2,_b202)
! 352: DeclBitfR(20,4,_b204)
! 353: DeclBitfR(21,10,_b2110)
! 354: DeclBitfR(21,2,_b212)
! 355: DeclBitfR(21,5,_b215)
! 356: DeclBitfR(22,5,_b225)
! 357: DeclBitfR(23,3,_b233)
! 358: DeclBitfR(24,1,_b241)
! 359: DeclBitfR(24,4,_b244)
! 360: DeclBitfR(24,8,_b248)
! 361: DeclBitfR(25,1,_b251)
! 362: DeclBitfR(26,1,_b261)
! 363: DeclBitfR(27,1,_b271)
! 364: DeclBitfR(27,4,_b274)
! 365: DeclBitfR(27,5,_b275)
! 366: DeclBitfR(28,1,_b281)
! 367: DeclBitfR(28,4,_b284)
! 368: DeclBitfR(29,1,_b291)
! 369: DeclBitfR(30,1,_b301)
! 370: DeclBitfR(30,2,_b302)
! 371: DeclBitfR(31,1,_b311)
! 372:
! 373: /******************/
! 374: /* Word subfields */
! 375: /******************/
! 376:
! 377: #define Sign(i) BitfR(i,0,1,_b01)
! 378: /* halfwords */
! 379: #define Hwd0(i) BitfR(i,0,16,_b016)
! 380: #define Hwd1sign(i) BitfR(i,16,1,_b161)
! 381: #define Hwd1(i) BitfR(i,16,16,_b1616)
! 382: /* bytes */
! 383: #define Byte0(i) BitfR(i,0,8,_b08)
! 384: #define Byte1sign(i) BitfR(i,8,1,_b81)
! 385: #define Byte1(i) BitfR(i,8,8,_b88)
! 386: #define Byte2(i) BitfR(i,16,8,_b168)
! 387: #define Byte3sign(i) BitfR(i,24,1,_b241)
! 388: #define Byte3(i) BitfR(i,24,8,_b248)
! 389: /* digits */
! 390: #define Digit0(i) BitfR(i,0,4,_b04)
! 391: #define Digit1(i) BitfR(i,4,4,_b44)
! 392: #define Digit2(i) BitfR(i,8,4,_b84)
! 393: #define Digit3(i) BitfR(i,12,4,_b124)
! 394: #define Digit4(i) BitfR(i,16,4,_b164)
! 395: #define Digit5(i) BitfR(i,20,4,_b204)
! 396: #define Digit6(i) BitfR(i,24,4,_b244)
! 397: #define Digit7(i) BitfR(i,28,4,_b284)
! 398:
! 399: /* Wordsize definitions */
! 400:
! 401: #define BIT_P_DW 64 /* bits/doubleword */
! 402: #define BIT_P_WD 32 /* bits/word */
! 403: #define BIT_P_HW 16 /* bits/halfword */
! 404: #define BIT_P_BYT 8 /* bits/byte */
! 405: #define BYT_P_DW 8 /* bytes/doubleword */
! 406: #define BYT_P_WD 4 /* bytes/word */
! 407: #define BYT_P_HW 2 /* bytes/halfword */
! 408:
! 409: /* Masks */
! 410:
! 411: #define WDMASK 0xffffffff /* 32-bit mask */
! 412: #define OFSMASK 0xffffffff /* 32-bit mask */
! 413: #define SIDMASK 0xffffffff /* 32-bit mask */
! 414: #define SIGNMASK 0x80000000 /* 32 bit word sign bit */
! 415:
! 416: /* Alignments */
! 417:
! 418: #define wdalign(ofs) (ofs &= ~3)
! 419: /*
! 420: * Header: /n/schirf/u/baford/CVS/mach4-parisc/kernel_unused/parisc/kdb/unasm.c,v 1.5 1994/07/21 22:32:05 mike Exp
! 421: *
! 422: * Spectrum Simulator Instruction Opcode Definitions
! 423: * Dan Magenheimer
! 424: * Computer Research Center, Hewlett-Packard Labs
! 425: *
! 426: * (c) copyright 1982
! 427: * (p) protected 1982
! 428: * The Hewlett-Packard Company
! 429: * Hewlett-Packard Laboratories
! 430: * Computer Research Center
! 431: * Palo Alto, California
! 432: *
! 433: * *** HP Company Confidential ***
! 434: *
! 435: * Log: unasm.c,v
! 436: * Revision 1.5 1994/07/21 22:32:05 mike
! 437: * official HP copyright notice
! 438: *
! 439: * Revision 1.4 1992/07/08 12:19:52 dalton
! 440: * Checkin before split to 1.0.4 release (by LBS).
! 441: *
! 442: * Revision 1.3 92/06/06 16:16:45 dalton
! 443: * *** empty log message ***
! 444: *
! 445: * Revision 1.2 92/06/06 15:42:28 dalton
! 446: * Changed include to be a path relative to hp800.
! 447: *
! 448: * Revision 1.1 92/06/06 14:05:33 dalton
! 449: * Initial revision
! 450: *
! 451: * Revision 1.2 91/04/14 20:29:49 osfrcs
! 452: * Initial version.
! 453: * [91/03/30 09:20:34 brezak]
! 454: *
! 455: * Revision 1.1.2.2 91/04/02 10:42:50 brezak
! 456: * Initial version.
! 457: * [91/03/30 09:20:34 brezak]
! 458: *
! 459: * Revision 1.1.1.2 91/03/30 09:20:34 brezak
! 460: * Initial version.
! 461: *
! 462: * Revision 6.1 89/09/06 10:39:58 burroughs
! 463: * Added shadow registers for gr0-gr7.
! 464: * gr0-7 are copied into sh0-7 whenever a trap occurs
! 465: * the instruction RFIR restores gr0-7 from sh0-7 and returns from
! 466: * interrupt.
! 467: * the "sh" command displays the shadow registers
! 468: * = sh7 0x789 works, too.
! 469: *
! 470: * Revision 6.0 89/09/01 15:46:37 15:46:37 burroughs (Greg Burroughs)
! 471: * baseline for pcx simple offsite
! 472: *
! 473: * Revision 5.2 87/09/02 14:30:23 14:30:23 kent
! 474: * separated stat gathering for indexed vs short.
! 475: * this will NOT work if cache hints ever get used
! 476: * since this field was assumed always zero
! 477: *
! 478: * Revision 5.1 87/02/27 11:12:16 11:12:16 kent (Kent McMullen)
! 479: * update all src to 5.1
! 480: *
! 481: * Revision 5.0 87/02/18 16:31:35 16:31:35 kent (Kent McMullen)
! 482: * update all revision numbers to 5.0 for release
! 483: *
! 484: * Revision 1.1 86/07/15 08:34:57 08:34:57 kent (Kent McMullen)
! 485: * Initial revision
! 486: *
! 487: * Revision 4.1 83/10/25 17:02:34 17:02:34 djm (Daniel J Magenheimer)
! 488: * First release for ACD v4
! 489: *
! 490: * Revision 3.0 83/06/13 10:24:45 djm (Daniel Magenheimer)
! 491: * First release for distribution
! 492: *
! 493: *
! 494: */
! 495:
! 496: /*
! 497: * Changes:
! 498: * 01/30/90 ejf Simplify SPOPn support, now only gives assist emulation trap.
! 499: * 01/19/90 ejf Replace linpak instructions with just FSTQ[SX].
! 500: * 12/19/89 ejf Add PA89 new floating point opcode 0E.
! 501: * 12/18/89 ejf Change 5 ops to PA89 format.
! 502: * 12/01/89 ejf Move additional instructions fmas, fmaa, fld2, fst2 to ssILst
! 503: * 09/22/89 ejf Fix unbalanced comments.
! 504: */
! 505:
! 506:
! 507: /* ..and modified by hand to remove the load/store short references */
! 508: /* ..and modified by hand to make memory management ops conform to the
! 509: * requirement that all subops of a major opcode begin in the same
! 510: * place and have the same length */
! 511:
! 512: #define LDW 0x12, 0x00, 0, 0 /* LOAD WORD */
! 513: #define LDWM 0x13, 0x00, 0, 0 /* LOAD WORD and MODIFY */
! 514: #define LDH 0x11, 0x00, 0, 0 /* LOAD HALFWORD */
! 515: #define LDB 0x10, 0x00, 0, 0 /* LOAD BYTE */
! 516: #define LDO 0x0d, 0x00, 0, 0 /* LOAD OFFSET */
! 517: #define STW 0x1a, 0x00, 0, 0 /* STORE WORD */
! 518: #define STWM 0x1b, 0x00, 0, 0 /* STORE WORD and MODIFY */
! 519: #define STH 0x19, 0x00, 0, 0 /* STORE HALFWORD */
! 520: #define STB 0x18, 0x00, 0, 0 /* STORE BYTE */
! 521: #define LDWX 0x03, 0x02, 19, 7 /* LOAD WORD INDEXED */
! 522: #define LDHX 0x03, 0x01, 19, 7 /* LOAD HALFWORD INDEXED */
! 523: #define LDBX 0x03, 0x00, 19, 7 /* LOAD BYTE INDEXED */
! 524: #define LDWAX 0x03, 0x06, 19, 7 /* LOAD WORD ABSOLUTE INDEXED */
! 525: #define LDCWX 0x03, 0x07, 19, 7 /* LOAD and CLEAR WORD INDEXED */
! 526: #define LDWS 0x03, 0x42, 19, 7 /* LOAD WORD SHORT DISP */
! 527: #define LDHS 0x03, 0x41, 19, 7 /* LOAD HALFWORD SHORT DISP */
! 528: #define LDBS 0x03, 0x40, 19, 7 /* LOAD BYTE SHORT DISP */
! 529: #define LDWAS 0x03, 0x46, 19, 7 /* LOAD WORD ABSOLUTE SHORT DISP */
! 530: #define LDCWS 0x03, 0x47, 19, 7 /* LOAD and CLEAR WORD SHORT DISP */
! 531: #define STWS 0x03, 0x4a, 19, 7 /* STORE WORD SHORT DISP */
! 532: #define STHS 0x03, 0x49, 19, 7 /* STORE HALFWORD SHORT DISP */
! 533: #define STBS 0x03, 0x48, 19, 7 /* STORE BYTE SHORT DISP */
! 534: #define STWAS 0x03, 0x4e, 19, 7 /* STORE WORD ABSOLUTE SHORT DISP */
! 535: #define STBYS 0x03, 0x4c, 19, 7 /* STORE BYTES SHORT DISP */
! 536: #define LDIL 0x08, 0x00, 0, 0 /* LOAD IMMED LEFT */
! 537: #define ADDIL 0x0a, 0x00, 0, 0 /* ADD IMMED LEFT */
! 538: #define BL 0x3a, 0x00, 16, 3 /* BRANCH [and LINK] */
! 539: #define GATE 0x3a, 0x01, 16, 3 /* GATEWAY */
! 540: #define BLR 0x3a, 0x02, 16, 3 /* BRANCH and LINK REGISTER */
! 541: #define BV 0x3a, 0x06, 16, 3 /* BRANCH VECTORED */
! 542: #define BE 0x38, 0x00, 0, 0 /* BRANCH EXTERNAL */
! 543: #define BLE 0x39, 0x00, 0, 0 /* BRANCH and LINK EXTERNAL */
! 544: #define MOVB 0x32, 0x00, 0, 0 /* MOVE and BRANCH */
! 545: #define MOVIB 0x33, 0x00, 0, 0 /* MOVE IMMED and BRANCH */
! 546: #define COMBT 0x20, 0x00, 0, 0 /* COMPARE and BRANCH if TRUE */
! 547: #define COMBF 0x22, 0x00, 0, 0 /* COMPARE and BRANCH if FALSE */
! 548: #define COMIBT 0x21, 0x00, 0, 0 /* COMPARE IMMED and BRANCH if TRUE */
! 549: #define COMIBF 0x23, 0x00, 0, 0 /* COMPARE IMMED and BRANCH if FALSE */
! 550: #define ADDBT 0x28, 0x00, 0, 0 /* ADD and BRANCH if TRUE */
! 551: #define ADDBF 0x2a, 0x00, 0, 0 /* ADD and BRANCH if FALSE */
! 552: #define ADDIBT 0x29, 0x00, 0, 0 /* ADD IMMED and BRANCH if TRUE */
! 553: #define ADDIBF 0x2b, 0x00, 0, 0 /* ADD IMMED and BRANCH if FALSE */
! 554: #define BVB 0x30, 0x00, 0, 0 /* BRANCH on VARIABLE BIT */
! 555: #define BB 0x31, 0x00, 0, 0 /* BRANCH on BIT */
! 556: #define ADD 0x02, 0x30, 20, 7 /* ADD */
! 557: #define ADDL 0x02, 0x50, 20, 7 /* ADD LOGICAL */
! 558: #define ADDO 0x02, 0x70, 20, 7 /* ADD and TRAP on OVFLO */
! 559: #define SH1ADD 0x02, 0x32, 20, 7 /* SHIFT 1, ADD */
! 560: #define SH1ADDL 0x02, 0x52, 20, 7 /* SHIFT 1, ADD LOGICAL */
! 561: #define SH1ADDO 0x02, 0x72, 20, 7 /* SHIFT 1, ADD and TRAP on OVFLO */
! 562: #define SH2ADD 0x02, 0x34, 20, 7 /* SHIFT 2, ADD */
! 563: #define SH2ADDL 0x02, 0x54, 20, 7 /* SHIFT 2, ADD LOGICAL */
! 564: #define SH2ADDO 0x02, 0x74, 20, 7 /* SHIFT 2, ADD and TRAP on OVFLO */
! 565: #define SH3ADD 0x02, 0x36, 20, 7 /* SHIFT 3, ADD */
! 566: #define SH3ADDL 0x02, 0x56, 20, 7 /* SHIFT 3, ADD LOGICAL */
! 567: #define SH3ADDO 0x02, 0x76, 20, 7 /* SHIFT 3, ADD and TRAP on OVFLO */
! 568: #define ADDC 0x02, 0x38, 20, 7 /* ADD with CARRY */
! 569: #define ADDCO 0x02, 0x78, 20, 7 /* ADD with CARRY and TRAP on OVFLO */
! 570: #define SUB 0x02, 0x20, 20, 7 /* SUBTRACT */
! 571: #define SUBO 0x02, 0x60, 20, 7 /* SUBTRACT and TRAP on OVFLO */
! 572: #define SUBB 0x02, 0x28, 20, 7 /* SUBTRACT with BORROW */
! 573: #define SUBBO 0x02, 0x68, 20, 7 /* SUBTRACT with BORROW and TRAP on OVFLO */
! 574: #define SUBT 0x02, 0x26, 20, 7 /* SUBTRACT and TRAP on COND */
! 575: #define SUBTO 0x02, 0x66, 20, 7 /* SUBTRACT and TRAP on COND or OVFLO */
! 576: #define DS 0x02, 0x22, 20, 7 /* DIVIDE STEP */
! 577: #define COMCLR 0x02, 0x44, 20, 7 /* COMPARE and CLEAR */
! 578: #define OR 0x02, 0x12, 20, 7 /* INCLUSIVE OR */
! 579: #define XOR 0x02, 0x14, 20, 7 /* EXCLUSIVE OR */
! 580: #define AND 0x02, 0x10, 20, 7 /* AND */
! 581: #define ANDCM 0x02, 0x00, 20, 7 /* AND COMPLEMENT */
! 582: #define UXOR 0x02, 0x1c, 20, 7 /* UNIT XOR */
! 583: #define UADDCM 0x02, 0x4c, 20, 7 /* UNIT ADD COMPLEMENT */
! 584: #define UADDCMT 0x02, 0x4e, 20, 7 /* UNIT ADD COMPLEMENT and TRAP on COND */
! 585: #define DCOR 0x02, 0x5c, 20, 7 /* DECIMAL CORRECT */
! 586: #define IDCOR 0x02, 0x5e, 20, 7 /* INTERMEDIATE DECIMAL CORRECT */
! 587: #define ADDI 0x2d, 0x00, 20, 1 /* ADD to IMMED */
! 588: #define ADDIO 0x2d, 0x01, 20, 1 /* ADD to IMMED and TRAP on OVFLO */
! 589: #define ADDIT 0x2c, 0x00, 20, 1 /* ADD to IMMED and TRAP on COND */
! 590: #define ADDITO 0x2c, 0x01, 20, 1 /* ADD to IMMED and TRAP on COND or OVFLO */
! 591: #define SUBI 0x25, 0x00, 20, 1 /* SUBTRACT from IMMED */
! 592: #define SUBIO 0x25, 0x01, 20, 1 /* SUBTRACT from IMMED and TRAP on OVFLO */
! 593: #define COMICLR 0x24, 0x00, 0, 0 /* COMPARE IMMED and CLEAR */
! 594: #define VSHD 0x34, 0x00, 19, 3 /* VARIABLE SHIFT DOUBLE */
! 595: #define SHD 0x34, 0x02, 19, 3 /* SHIFT DOUBLE */
! 596: #define VEXTRU 0x34, 0x04, 19, 3 /* VARIABLE EXTRACT RIGHT UNSIGNED */
! 597: #define VEXTRS 0x34, 0x05, 19, 3 /* VARIABLE EXTRACT RIGHT SIGNED */
! 598: #define EXTRU 0x34, 0x06, 19, 3 /* EXTRACT RIGHT UNSIGNED */
! 599: #define EXTRS 0x34, 0x07, 19, 3 /* EXTRACT RIGHT SIGNED */
! 600: #define VDEP 0x35, 0x01, 19, 3 /* VARIABLE DEPOSIT */
! 601: #define DEP 0x35, 0x03, 19, 3 /* DEPOSIT */
! 602: #define VDEPI 0x35, 0x05, 19, 3 /* VARIABLE DEPOSIT IMMED */
! 603: #define DEPI 0x35, 0x07, 19, 3 /* DEPOSIT IMMED */
! 604: #define ZVDEP 0x35, 0x00, 19, 3 /* ZERO and VARIABLE DEPOSIT */
! 605: #define ZDEP 0x35, 0x02, 19, 3 /* ZERO and DEPOSIT */
! 606: #define ZVDEPI 0x35, 0x04, 19, 3 /* ZERO and VARIABLE DEPOSIT IMMED */
! 607: #define ZDEPI 0x35, 0x06, 19, 3 /* ZERO and DEPOSIT IMMED */
! 608: #define BREAK 0x00, 0x00, 19, 8 /* BREAK */
! 609: #define RFI 0x00, 0x60, 19, 8 /* RETURN FROM INTERRUPTION */
! 610: #define RFIR 0x00, 0x65, 19, 8 /* RFI & RESTORE SHADOW REGISTERS */
! 611: #define SSM 0x00, 0x6b, 19, 8 /* SET SYSTEM MASK */
! 612: #define RSM 0x00, 0x73, 19, 8 /* RESET SYSTEM MASK */
! 613: #define MTSM 0x00, 0xc3, 19, 8 /* MOVE TO SYSTEM MASK */
! 614: #define LDSID 0x00, 0x85, 19, 8 /* LOAD SPACE IDENTIFIER */
! 615: #define MTSP 0x00, 0xc1, 19, 8 /* MOVE TO SPACE REGISTER */
! 616: #define MTCTL 0x00, 0xc2, 19, 8 /* MOVE TO SYSTEM CONTROL REGISTER */
! 617: #define MFSP 0x00, 0x25, 19, 8 /* MOVE FROM SPACE REGISTER */
! 618: #define MFCTL 0x00, 0x45, 19, 8 /* MOVE FROM SYSTEM CONTROL REGISTER */
! 619: #define SYNC 0x00, 0x20, 19, 8 /* SYNCHRONIZE DATA CACHE */
! 620: #define DIAG 0x05, 0x00, 0, 0 /* DIAGNOSE */
! 621: #define SPOP 0x04, 0x00, 0, 0 /* SPECIAL FUNCTION UNIT */
! 622: #define COPR 0x0c, 0x00, 0, 0 /* COPROCESSOR */
! 623: #define CLDWX 0x09, 0x00, 19, 4 /* COPROCESSOR LOAD WORD INDEXED */
! 624: #define CLDDX 0x0b, 0x00, 19, 4 /* COPROCESSOR LOAD WORD INDEXED */
! 625: #define CSTWX 0x09, 0x01, 19, 4 /* COPROCESSOR STORE WORD INDEXED */
! 626: #define CSTDX 0x0b, 0x01, 19, 4 /* COPROCESSOR STORE WORD INDEXED */
! 627: #define CLDWS 0x09, 0x08, 19, 4 /* COPROCESSOR LOAD WORD SHORT */
! 628: #define CLDDS 0x0b, 0x08, 19, 4 /* COPROCESSOR LOAD WORD SHORT */
! 629: #define CSTWS 0x09, 0x09, 19, 4 /* COPROCESSOR STORE WORD SHORT */
! 630: #define CSTDS 0x0b, 0x09, 19, 4 /* COPROCESSOR STORE WORD SHORT */
! 631: #define FLOAT0 0x0e, 0x00, 21, 2 /* FLOATING POINT CLASS 0 */
! 632: #define FLOAT1 0x0e, 0x01, 21, 2 /* FLOATING POINT CLASS 1 */
! 633: #define FLOAT2 0x0e, 0x02, 21, 2 /* FLOATING POINT CLASS 2 */
! 634: #define FLOAT3 0x0e, 0x03, 21, 2 /* FLOATING POINT CLASS 3 */
! 635: #define FMPYSUB 0x26, 0x00, 0, 0 /* FP MULTIPLY AND SUBTRACT */
! 636: #define FMPYADD 0x06, 0x00, 0, 0 /* FP MULTIPLY AND ADD/TRUNCATE */
! 637: #define FSTQX 0x0f, 0x01, 19, 4 /* FLOATING POINT STORE QUAD INDEXED */
! 638: #define FSTQS 0x0f, 0x09, 19, 4 /* FLOATING POINT STORE QUAD SHORT */
! 639: /* all of the following have been pushed around to conform */
! 640: #define PROBER 0x01, 0x46, 19, 7 /* PROBE READ ACCESS */
! 641: #ifdef notdef
! 642: #define PROBERI 0x01, 0xc6, 19, 7 /* PROBE READ ACCESS IMMEDIATE */
! 643: #endif
! 644: #define PROBEW 0x01, 0x47, 19, 7 /* PROBE WRITE ACCESS */
! 645: #ifdef notdef
! 646: #define PROBEWI 0x01, 0xc7, 19, 7 /* PROBE WRITE ACCESS IMMEDIATE */
! 647: #endif
! 648: #define LPA 0x01, 0x4d, 19, 7 /* LOAD PHYSICAL ADDRESS */
! 649: #define LHA 0x01, 0x4c, 19, 7 /* LOAD HASH ADDRESS */
! 650: #define PDTLB 0x01, 0x48, 19, 7 /* PURGE DATA TRANS LOOKASIDE BUFFER */
! 651: #define PITLB 0x01, 0x08, 19, 7 /* PURGE INST TRANS LOOKASIDE BUFFER */
! 652: #define PDTLBE 0x01, 0x49, 19, 7 /* PURGE DATA TLB ENTRY */
! 653: #define PITLBE 0x01, 0x09, 19, 7 /* PURGE INST TLB ENTRY */
! 654: #define IDTLBA 0x01, 0x41, 19, 7 /* INSERT DATA TLB ADDRESS */
! 655: #define IITLBA 0x01, 0x01, 19, 7 /* INSERT INSTRUCTION TLB ADDRESS */
! 656: #define IDTLBP 0x01, 0x40, 19, 7 /* INSERT DATA TLB PROTECTION */
! 657: #define IITLBP 0x01, 0x00, 19, 7 /* INSERT INSTRUCTION TLB PROTECTION */
! 658: #define PDC 0x01, 0x4e, 19, 7 /* PURGE DATA CACHE */
! 659: #define FDC 0x01, 0x4a, 19, 7 /* FLUSH DATA CACHE */
! 660: #define FIC 0x01, 0x0a, 19, 7 /* FLUSH INSTRUCTION CACHE */
! 661: #define FDCE 0x01, 0x4b, 19, 7 /* FLUSH DATA CACHE ENTRY */
! 662: #define FICE 0x01, 0x0b, 19, 7 /* FLUSH DATA CACHE ENTRY */
! 663:
! 664: /*
! 665: * Header: /n/schirf/u/baford/CVS/mach4-parisc/kernel_unused/parisc/kdb/unasm.c,v 1.5 1994/07/21 22:32:05 mike Exp
! 666: *
! 667: * Spectrum Simulator Instruction Set Constants and Datatypes
! 668: * Dan Magenheimer - 4/28/82
! 669: * Computer Research Center, Hewlett-Packard Labs
! 670: *
! 671: * (c) copyright 1982
! 672: * (p) protected 1982
! 673: * The Hewlett-Packard Company
! 674: * Hewlett-Packard Laboratories
! 675: * Computer Research Center
! 676: * Palo Alto, California
! 677: *
! 678: * *** HP Company Confidential ***
! 679: *
! 680: * Log: unasm.c,v
! 681: * Revision 1.5 1994/07/21 22:32:05 mike
! 682: * official HP copyright notice
! 683: *
! 684: * Revision 1.4 1992/07/08 12:19:52 dalton
! 685: * Checkin before split to 1.0.4 release (by LBS).
! 686: *
! 687: * Revision 1.3 92/06/06 16:16:45 dalton
! 688: * *** empty log message ***
! 689: *
! 690: * Revision 1.2 92/06/06 15:42:28 dalton
! 691: * Changed include to be a path relative to hp800.
! 692: *
! 693: * Revision 1.1 92/06/06 14:05:33 dalton
! 694: * Initial revision
! 695: *
! 696: * Revision 1.2 91/04/14 20:29:49 osfrcs
! 697: * Initial version.
! 698: * [91/03/30 09:20:34 brezak]
! 699: *
! 700: * Revision 1.1.2.2 91/04/02 10:42:50 brezak
! 701: * Initial version.
! 702: * [91/03/30 09:20:34 brezak]
! 703: *
! 704: * Revision 1.1.1.2 91/03/30 09:20:34 brezak
! 705: * Initial version.
! 706: *
! 707: ;Revision 1.1 88/07/11 14:05:21 14:05:21 ren (Bob Naas)
! 708: ;Initial revision
! 709: ;
! 710: * Revision 5.1 87/02/27 11:12:23 11:12:23 kent (Kent McMullen)
! 711: * update all src to 5.1
! 712: *
! 713: * Revision 5.0 87/02/18 16:31:52 16:31:52 kent (Kent McMullen)
! 714: * update all revision numbers to 5.0 for release
! 715: *
! 716: * Revision 1.1 86/07/15 08:35:00 08:35:00 kent (Kent McMullen)
! 717: * Initial revision
! 718: *
! 719: * Revision 4.3 85/11/12 09:28:44 09:28:44 viggy (Viggy Mokkarala)
! 720: * first mpsim version, partially stable
! 721: *
! 722: * Revision 4.2 84/07/16 17:20:57 17:20:57 djm ()
! 723: * Define field macros for COPR and SFU insts
! 724: *
! 725: * Revision 4.1 83/10/25 17:10:14 djm (Daniel Magenheimer)
! 726: * First release for ACD v4
! 727: *
! 728: * Revision 3.1 83/08/03 14:09:59 djm (Daniel Magenheimer)
! 729: * Sys calls, args, -S, bug fixes, etc.
! 730: *
! 731: * Revision 3.0 83/06/13 10:25:13 djm (Daniel Magenheimer)
! 732: * First release for distribution
! 733: *
! 734: *
! 735: */
! 736: /*
! 737: * Changes:
! 738: * 12/01/89 ejf Add Rsd(), Rse(), Rtd(), Rte() for 5 ops.
! 739: * 11/30/89 ejf Make instruction use counters shared, not per cpu.
! 740: * 11/28/89 ejf Change majoropcode for quicker extension extract.
! 741: */
! 742:
! 743:
! 744:
! 745: /*
! 746: * Dependencies: std.h, ssDefs.h, bits.h
! 747: */
! 748:
! 749:
! 750: /* Lookup/Execute structure for instructions */
! 751: struct inst {
! 752: u_char majopc; /* major opcode of instruction, 0..MAXOPC */
! 753: u_char opcext; /* opcode extension, 0 if not applic. */
! 754: u_char extbs; /* starting bit pos of extension field */
! 755: u_char extbl; /* bit length of extension field */
! 756: u_int count; /* frequency counter for analysis */
! 757: char mnem[8]; /* ascii mnemonic */
! 758: /* disassembly function */
! 759: int (*dasmfcn)(const struct inst *, OFS, int);
! 760: };
! 761:
! 762:
! 763: #define NMAJOPCS 64
! 764:
! 765: struct majoropcode {
! 766: const struct inst **subops; /* pointer to table of subops indexed by
! 767: * opcode extension */
! 768: u_int maxsubop; /* largest opcode extension value or 0 */
! 769: u_int extshft; /* right shift amount for extension field */
! 770: u_int extmask; /* post shift mask for extension field */
! 771: };
! 772:
! 773: #define OpExt(i,m) ((i >> m->extshft) & m->extmask) /* extract opcode extension */
! 774:
! 775:
! 776: /*****************************/
! 777: /* Miscellaneous definitions */
! 778: /*****************************/
! 779:
! 780: /* Load/Store Indexed Opcode Extension Cache Control */
! 781: #define NOACTION 0
! 782: #define STACKREF 1
! 783: #define SEQPASS 2
! 784: #define PREFETCH 3
! 785:
! 786: /******************************/
! 787: /* Fields within instructions */
! 788: /******************************/
! 789:
! 790: /* opcode */
! 791: #define Opcode(i) BitfR(i,0,6,_b06)
! 792: /* opcode true/false bit */
! 793: #define OpcTF(i) BitfR(i,4,1,_b41)
! 794: /* register sources */
! 795: #define Rsa(i) BitfR(i,11,5,_b115)
! 796: #define Rsb(i) BitfR(i,6,5,_b65)
! 797: #define Rsc(i) BitfR(i,27,5,_b275)
! 798: #define Rsd(i) BitfR(i,21,5,_b215)
! 799: #define Rse(i) BitfR(i,16,5,_b165)
! 800: /* register targets */
! 801: #define Rta(i) BitfR(i,11,5,_b115)
! 802: #define Rtb(i) BitfR(i,6,5,_b65)
! 803: #define Rtc(i) BitfR(i,27,5,_b275)
! 804: #define Rtd(i) BitfR(i,21,5,_b215)
! 805: #define Rte(i) BitfR(i,16,5,_b165)
! 806: /* 5-bit immediates (Magnitude, Sign) */
! 807: #define Imb5(i) BitfR(i,6,5,_b65)
! 808: #define Ima5M(i) BitfR(i,11,4,_b114)
! 809: #define Ima5S(i) BitfR(i,15,1,_b151)
! 810: #define Ima5A(i) BitfR(i,11,5,_b115)
! 811: #define Imd5(i) BitfR(i,22,5,_b225)
! 812: #define Imc5M(i) BitfR(i,27,4,_b274)
! 813: #define Imc5S(i) BitfR(i,31,1,_b311)
! 814: #define Imc5A(i) BitfR(i,27,5,_b275)
! 815: /* Other immediates */
! 816: #define Im21L(i) BitfR(i,18,2,_b182)
! 817: #define Im21H(i) BitfR(i,20,11,_b2011)
! 818: #define Im21M1(i) BitfR(i,16,2,_b162)
! 819: #define Im21M2(i) BitfR(i,11,5,_b115)
! 820: #define Im21S(i) BitfR(i,31,1,_b311)
! 821: #define Im11M(i) BitfR(i,21,10,_b2110)
! 822: #define Im11S(i) BitfR(i,31,1,_b311)
! 823: /* displacements/offsets */
! 824: #define DispM(i) BitfR(i,18,13,_b1813)
! 825: #define DispS(i) BitfR(i,31,1,_b311)
! 826: #define Off5(i) BitfR(i,11,5,_b115)
! 827: #define Off11H(i) BitfR(i,19,10,_b1910)
! 828: #define Off11L(i) BitfR(i,29,1,_b291)
! 829: #define OffS(i) BitfR(i,31,1,_b311)
! 830: /* miscellaneous */
! 831: #define Dss(i) BitfR(i,16,2,_b162)
! 832: #define Cond(i) BitfR(i,16,3,_b163)
! 833: #define Cneg(i) BitfR(i,19,1,_b191)
! 834: #define Cond4(i) BitfR(i,16,4,_b164) /* Cond AND Cneg */
! 835: #define Nu(i) BitfR(i,30,1,_b301)
! 836: #define SrL(i) BitfR(i,16,2,_b162)
! 837: #define SrH(i) BitfR(i,18,1,_b181)
! 838: #define ShortDisp(i) BitfR(i,19,1,_b191)
! 839: #define IndxShft(i) BitfR(i,18,1,_b181)
! 840: #define ModBefore(i) BitfR(i,18,1,_b181)
! 841: #define CacheCtrl(i) BitfR(i,20,2,_b202)
! 842: #define Modify(i) BitfR(i,26,1,_b261)
! 843: #define ProbeI(i) BitfR(i,18,1,_b181)
! 844: #define Uid(i) BitfR(i,23,3,_b233)
! 845: #define Sfu(i) BitfR(i,23,3,_b233)
! 846: #define CopExt17(i) BitfR(i,6,17,_b617)
! 847: #define CopExt5(i) BitfR(i,27,5,_b275)
! 848: #define SpopType(i) BitfR(i,21,2,_b212)
! 849: #define SpopExt15(i) BitfR(i,6,15,_b615)
! 850: #define SpopExt10(i) BitfR(i,11,10,_b1110)
! 851: #define SpopExt5L(i) BitfR(i,16,5,_b165)
! 852: #define SpopExt5(i) BitfR(i,27,5,_b275)
! 853: #define NoMajOpc(i) BitfR(i,6,26,_b626)
! 854: #define Bi1(i) BitfR(i,27,5,_b275) /* fields in BREAK */
! 855: #define Bi2(i) BitfR(i,6,13,_b613)
! 856:
! 857: /* fragmented field collating macros */
! 858: #define Ima5(i) (Ima5S(i) ? Ima5M(i) | (-1<<4) : Ima5M(i))
! 859:
! 860: #define Imc5(i) (Imc5S(i) ? Imc5M(i) | (-1<<4) : Imc5M(i))
! 861:
! 862: #define Disp(i) (DispS(i) ? DispM(i) | (-1<<13) : DispM(i))
! 863:
! 864: #define Im21(i) (Im21S(i) << 31 | Im21H(i) << 20 | Im21M1(i) << 18 | \
! 865: Im21M2(i) << 13 | Im21L(i) << 11)
! 866:
! 867: #define Im11(i) (Im11S(i) ? Im11M(i) | (-1<<10) : Im11M(i))
! 868:
! 869: #define Bdisp(i) ((OffS(i) ? (Off5(i)<<11 | Off11L(i)<<10|Off11H(i)) \
! 870: /* branch displacement (bytes) */ | (-1 << 16) \
! 871: : (Off5(i)<<11|Off11L(i)<<10|Off11H(i))) << 2)
! 872:
! 873: #define Cbdisp(i) ((OffS(i) ? (Off11L(i) << 10 | Off11H(i)) \
! 874: /* compare/branch disp (bytes) */ | (-1 << 11) \
! 875: : Off11L(i) << 10 | Off11H(i)) << 2)
! 876:
! 877: #define Sr(i) (SrH(i)<<2 | SrL(i))
! 878:
! 879: /* sfu/copr */
! 880: #define CoprExt1(i) (CopExt17(i))
! 881: #define CoprExt2(i) (CopExt5(i))
! 882: #define CoprExt(i) ((CopExt17(i)<<5) | CopExt5(i))
! 883: #define Spop0Ext(i) ((SpopExt15(i)<<5) | SpopExt5(i))
! 884: #define Spop1Ext(i) (SpopExt15(i))
! 885: #define Spop2Ext(i) ((SpopExt10(i)<<5) | SpopExt5(i))
! 886: #define Spop3Ext(i) ((SpopExt5L(i)<<5) | SpopExt5(i))
! 887:
! 888:
! 889: /*##################### Globals - Imports ##################################*/
! 890:
! 891: /* Disassembly functions */
! 892: int fcoprDasm(int w, u_int op1, u_int);
! 893: char *edDCond(u_int cond);
! 894: char *unitDCond(u_int cond);
! 895: char *addDCond(u_int cond);
! 896: char *subDCond(u_int cond);
! 897: int blDasm(const struct inst *i, OFS ofs, int w);
! 898: int ldDasm(const struct inst *, OFS, int);
! 899: int stDasm(const struct inst *i, OFS, int);
! 900: int addDasm(const struct inst *i, OFS, int);
! 901: int unitDasm(const struct inst *i, OFS, int);
! 902: int iaDasm(const struct inst *i, OFS, int);
! 903: int shdDasm(const struct inst *i, OFS, int);
! 904: int extrDasm(const struct inst *i, OFS, int);
! 905: int vextrDasm(const struct inst *i, OFS, int);
! 906: int depDasm(const struct inst *i, OFS, int);
! 907: int vdepDasm(const struct inst *i, OFS, int);
! 908: int depiDasm(const struct inst *i, OFS, int);
! 909: int vdepiDasm(const struct inst *i, OFS, int);
! 910: int limmDasm(const struct inst *i, OFS, int);
! 911: int brkDasm(const struct inst *i, OFS, int);
! 912: int lpkDasm(const struct inst *i, OFS, int);
! 913: int fmpyaddDasm(const struct inst *i, OFS, int);
! 914: int fmpysubDasm(const struct inst *i, OFS, int);
! 915: int floatDasm(const struct inst *i, OFS, int);
! 916: int coprDasm(const struct inst *i, OFS, int);
! 917: int diagDasm(const struct inst *i, OFS, int);
! 918: int scDasm(const struct inst *i, OFS, int);
! 919: int mmgtDasm(const struct inst *i, OFS, int);
! 920: int ldxDasm(const struct inst *i, OFS, int);
! 921: int stsDasm(const struct inst *i, OFS, int);
! 922: int stbysDasm(const struct inst *i, OFS, int);
! 923: int brDasm(const struct inst *i, OFS, int);
! 924: int bvDasm(const struct inst *i, OFS, int);
! 925: int beDasm(const struct inst *i, OFS, int);
! 926: int cbDasm(const struct inst *i,OFS ofs, int);
! 927: int cbiDasm(const struct inst *i,OFS ofs, int);
! 928: int bbDasm(const struct inst *i,OFS ofs, int);
! 929: int ariDasm(const struct inst *i, OFS, int);
! 930:
! 931: /*##################### Globals - Exports ##################################*/
! 932: /*##################### Local Variables ####################################*/
! 933:
! 934: static const char fmtStrTbl[][5] = { "sgl", "dbl", "sgl", "quad" };
! 935: static const char condStrTbl[][7] = {
! 936: "false?", "false", "?", "!<=>", "=", "=t", "?=", "!<>",
! 937: "!?>=", "<", "?<", "!>=", "!?>", "<=", "?<=", "!>",
! 938: "!?<=", ">", "?>", "!<=", "!?<", ">=", "?>=", "!<",
! 939: "!?=", "<>", "!=", "!=t", "!?", "<=>", "true?", "true"
! 940: };
! 941: static const char fsreg[][5] = {
! 942: "r0L", "r0R", "r1L", "r1R", "r2L", "r2R", "r3L", "r3R",
! 943: "r4L", "r4R", "r5L", "r5R", "r6L", "r6R", "r7L", "r7R",
! 944: "r8L", "r8R", "r9L", "r9R", "r10L", "r10R", "r11L", "r11R",
! 945: "r12L", "r12R", "r13L", "r13R", "r14L", "r14R", "r15L", "r15R",
! 946: "r16L", "r16R", "r17L", "r17R", "r18L", "r18R", "r19L", "r19R",
! 947: "r20L", "r20R", "r21L", "r21R", "r22L", "r22R", "r23L", "r23R",
! 948: "r24L", "r24R", "r25L", "r25R", "r26L", "r26R", "r27L", "r27R",
! 949: "r28L", "r28R", "r29L", "r29R", "r30L", "r30R", "r31L", "r31R"
! 950: };
! 951: static const char fdreg[][4] = {
! 952: "r0", "r0", "r1", "r1", "r2", "r2", "r3", "r3",
! 953: "r4", "r4", "r5", "r5", "r6", "r6", "r7", "r7",
! 954: "r8", "r8", "r9", "r9", "r10", "r10", "r11", "r11",
! 955: "r12", "r12", "r13", "r13", "r14", "r14", "r15", "r15",
! 956: "r16", "r16", "r17", "r17", "r18", "r18", "r19", "r19",
! 957: "r20", "r20", "r21", "r21", "r22", "r22", "r23", "r23",
! 958: "r24", "r24", "r25", "r25", "r26", "r26", "r27", "r27",
! 959: "r28", "r28", "r29", "r29", "r30", "r30", "r31", "r31"
! 960: };
! 961:
! 962: /*##################### Macros #############################################*/
! 963:
! 964: #define Match(s) (strncmp(s,i->mnem,sizeof(s)-1) == 0)
! 965:
! 966: /* bits for assist ops */
! 967: #define AstNu(w) Modify(w)
! 968: #define Fpi(w) (Uid(w)>3)
! 969:
! 970: /* bits for 5 ops */
! 971: #define SinglePrec(i) Modify(i)
! 972: #define Ms1(i) ((Rsb(i)<<1)+(SinglePrec(i)?((Rsb(i)>15)?1:32):0))
! 973: #define Ms2(i) ((Rsa(i)<<1)+(SinglePrec(i)?((Rsa(i)>15)?1:32):0))
! 974: #define Mt(i) ((Rtc(i)<<1)+(SinglePrec(i)?((Rtc(i)>15)?1:32):0))
! 975: #define As(i) ((Rsd(i)<<1)+(SinglePrec(i)?((Rsd(i)>15)?1:32):0))
! 976: #define Ad(i) ((Rte(i)<<1)+(SinglePrec(i)?((Rte(i)>15)?1:32):0))
! 977:
! 978: /*##################### Globals - Exports ##################################*/
! 979:
! 980: /* To replace instr function, do the following: */
! 981: /* a) locate the desired entry in instrs[] below */
! 982: /* b) change the 3rd field if an alternate mneumonic is */
! 983: /* desired for window disassembly */
! 984: /* c) change the 4th field to the name of the function being */
! 985: /* used for replacement (i.e. ldwRepl instead of ldw) */
! 986: /* d) change the 5th field if an alternate disassembly routine */
! 987: /* is desired (i.e. ldDasmRepl) */
! 988:
! 989: static const struct inst instrs[] = {
! 990: { LDW, 0, "ldw", ldDasm },
! 991: { LDH, 0, "ldh", ldDasm },
! 992: { LDB, 0, "ldb", ldDasm },
! 993: { LDWM, 0, "ldwm", ldDasm },
! 994: { LDO, 0, "ldo", ldDasm },
! 995: { STW, 0, "stw", stDasm },
! 996: { STH, 0, "sth", stDasm },
! 997: { STB, 0, "stb", stDasm },
! 998: { STWM, 0, "stwm", stDasm },
! 999: { LDWX, 0, "ldw", ldxDasm },
! 1000: { LDHX, 0, "ldh", ldxDasm },
! 1001: { LDBX, 0, "ldb", ldxDasm },
! 1002: { LDCWX, 0, "ldcw", ldxDasm },
! 1003: { LDWAX, 0, "ldwa", ldxDasm },
! 1004: { LDWS, 0, "ldw", ldxDasm },
! 1005: { LDHS, 0, "ldh", ldxDasm },
! 1006: { LDBS, 0, "ldb", ldxDasm },
! 1007: { LDCWS, 0, "ldcw", ldxDasm },
! 1008: { LDWAS, 0, "ldwa", ldxDasm },
! 1009: { STWS, 0, "stws", stsDasm },
! 1010: { STHS, 0, "sths", stsDasm },
! 1011: { STBS, 0, "stbs", stsDasm },
! 1012: { STWAS, 0, "stwas", stsDasm },
! 1013: { STBYS, 0, "stbys", stbysDasm },
! 1014: { LDIL, 0, "ldil", limmDasm },
! 1015: { ADDIL, 0, "addil", limmDasm },
! 1016: { GATE, 0, "gate", blDasm },
! 1017: { BL, 0, "b", blDasm },
! 1018: { BLR, 0, "blr", brDasm },
! 1019: { BV, 0, "bv", bvDasm },
! 1020: { BE, 0, "be", beDasm },
! 1021: { BLE, 0, "ble", beDasm },
! 1022: { COMBT, 0, "combt", cbDasm },
! 1023: { COMBF, 0, "combf", cbDasm },
! 1024: { COMIBT, 0, "comibt", cbiDasm },
! 1025: { COMIBF, 0, "comibf", cbiDasm },
! 1026: { ADDBT, 0, "addbt", cbDasm },
! 1027: { ADDBF, 0, "addbf", cbDasm },
! 1028: { ADDIBT, 0, "addibt", cbiDasm },
! 1029: { ADDIBF, 0, "addibf", cbiDasm },
! 1030: { MOVB, 0, "movb", cbDasm },
! 1031: { MOVIB, 0, "movib", cbiDasm },
! 1032: { BB, 0, "bb", bbDasm },
! 1033: { BVB, 0, "bvb", bbDasm },
! 1034: { SUBO, 0, "subo", ariDasm },
! 1035: { ADD, 0, "add", addDasm },
! 1036: { ADDL, 0, "addl", addDasm },
! 1037: { ADDO, 0, "addo", ariDasm },
! 1038: { SH1ADD, 0, "sh1add", ariDasm },
! 1039: { SH1ADDL,0, "sh1addl", ariDasm },
! 1040: { SH1ADDO,0, "sh1addo", ariDasm },
! 1041: { SH2ADD, 0, "sh2add", ariDasm },
! 1042: { SH2ADDL,0, "sh2addl", ariDasm },
! 1043: { SH2ADDO,0, "sh2addo", ariDasm },
! 1044: { SH3ADD, 0, "sh3add", ariDasm },
! 1045: { SH3ADDL,0, "sh3addl", ariDasm },
! 1046: { SH3ADDO,0, "sh3addo", ariDasm },
! 1047: { SUB, 0, "sub", ariDasm },
! 1048: { ADDCO, 0, "addco", ariDasm },
! 1049: { SUBBO, 0, "subbo", ariDasm },
! 1050: { ADDC, 0, "addc", ariDasm },
! 1051: { SUBB, 0, "subb", ariDasm },
! 1052: { COMCLR, 0, "comclr", ariDasm },
! 1053: { OR, 0, "or", ariDasm },
! 1054: { AND, 0, "and", ariDasm },
! 1055: { XOR, 0, "xor", ariDasm },
! 1056: { ANDCM, 0, "andcm", ariDasm },
! 1057: { DS, 0, "ds", ariDasm },
! 1058: { UXOR, 0, "uxor", unitDasm },
! 1059: { UADDCM, 0, "uaddcm", unitDasm },
! 1060: { UADDCMT,0, "uaddcmt", unitDasm },
! 1061: { SUBTO, 0, "subto", ariDasm },
! 1062: { SUBT, 0, "subt", ariDasm },
! 1063: { DCOR, 0, "dcor", unitDasm },
! 1064: { IDCOR, 0, "idcor", unitDasm },
! 1065: { ADDIO, 0, "addio", iaDasm },
! 1066: { SUBIO, 0, "subio", iaDasm },
! 1067: { ADDI, 0, "addi", iaDasm },
! 1068: { SUBI, 0, "subi", iaDasm },
! 1069: { COMICLR,0, "comiclr", iaDasm },
! 1070: { ADDITO, 0, "addito", iaDasm },
! 1071: { ADDIT, 0, "addit", iaDasm },
! 1072: { SHD, 0, "shd", shdDasm },
! 1073: { VSHD, 0, "vshd", shdDasm },
! 1074: { EXTRU, 0, "extru", extrDasm },
! 1075: { EXTRS, 0, "extrs", extrDasm },
! 1076: { VEXTRU, 0, "vextru", vextrDasm },
! 1077: { VEXTRS, 0, "vextrs", vextrDasm },
! 1078: { DEP, 0, "dep", depDasm },
! 1079: { VDEP, 0, "vdep", vdepDasm },
! 1080: { DEPI, 0, "depi", depiDasm },
! 1081: { VDEPI, 0, "vdepi", vdepiDasm },
! 1082: { ZDEP, 0, "zdep", depDasm },
! 1083: { ZVDEP, 0, "zvdep", vdepDasm },
! 1084: { ZDEPI, 0, "zdepi", depiDasm },
! 1085: { ZVDEPI, 0, "zvdepi", vdepiDasm },
! 1086: { BREAK, 0, "break", brkDasm },
! 1087: { RFI, 0, "rfi", 0 },
! 1088: { RFIR, 0, "rfir", 0 },
! 1089: { SSM, 0, "ssm", scDasm },
! 1090: { RSM, 0, "rsm", scDasm },
! 1091: { MTSM, 0, "mtsm", scDasm },
! 1092: { PROBER, 0, "prober", mmgtDasm },
! 1093: { PROBEW, 0, "probew", mmgtDasm },
! 1094: { LPA, 0, "lpa", mmgtDasm },
! 1095: { LHA, 0, "lha", mmgtDasm },
! 1096: { LDSID, 0, "ldsid", scDasm },
! 1097: { PDTLB, 0, "pdtlb", mmgtDasm },
! 1098: { PDTLBE, 0, "pdtlbe", mmgtDasm },
! 1099: { PITLB, 0, "pitlb", mmgtDasm },
! 1100: { PITLBE, 0, "pitlbe", mmgtDasm },
! 1101: { IDTLBA, 0, "idtlba", mmgtDasm },
! 1102: { IITLBA, 0, "iitlba", mmgtDasm },
! 1103: { IDTLBP, 0, "idtlbp", mmgtDasm },
! 1104: { IITLBP, 0, "iitlbp", mmgtDasm },
! 1105: { FIC, 0, "fic", mmgtDasm },
! 1106: { FICE, 0, "fice", mmgtDasm },
! 1107: { PDC, 0, "pdc", mmgtDasm },
! 1108: { FDC, 0, "fdc", mmgtDasm },
! 1109: { FDCE, 0, "fdce", mmgtDasm },
! 1110: { SYNC, 0, "sync", 0 },
! 1111: { MTSP, 0, "mtsp", scDasm },
! 1112: { MTCTL, 0, "mtctl", scDasm },
! 1113: { MFSP, 0, "mfsp", scDasm },
! 1114: { MFCTL, 0, "mfctl", scDasm },
! 1115: { DIAG, 0, "diag", diagDasm },
! 1116: { SPOP, 0, "???", 0 },
! 1117: { COPR, 0, "copr", coprDasm },
! 1118: { CLDWX, 0, "cldw", coprDasm },
! 1119: { CLDDX, 0, "cldd", coprDasm },
! 1120: { CSTWX, 0, "cstw", coprDasm },
! 1121: { CSTDX, 0, "cstd", coprDasm },
! 1122: { CLDWS, 0, "cldw", coprDasm },
! 1123: { CLDDS, 0, "cldd", coprDasm },
! 1124: { CSTWS, 0, "cstw", coprDasm },
! 1125: { CSTDS, 0, "cstd", coprDasm },
! 1126: { FLOAT0, 0, "f", floatDasm },
! 1127: { FLOAT1, 0, "fcnv", floatDasm },
! 1128: { FLOAT2, 0, "f", floatDasm },
! 1129: { FLOAT3, 0, "f", floatDasm },
! 1130: { FMPYSUB,0, "fmpy", fmpysubDasm },
! 1131: { FMPYADD,0, "fmpy", fmpyaddDasm },
! 1132: { FSTQX, 0, "fstqx", lpkDasm },
! 1133: { FSTQS, 0, "fstqs", lpkDasm },
! 1134: {0}
! 1135: };
! 1136:
! 1137:
! 1138: static const struct inst illeg = { 0, 0, 0, 0, 0, "???", 0 };
! 1139: static const struct inst *so_sysop[0xd0];
! 1140: static const struct inst *so_mmuop[0x50];
! 1141: static const struct inst *so_arith[0x80];
! 1142: static const struct inst *so_loads[0x50];
! 1143: static const struct inst *so_cldw [0x0A];
! 1144: static const struct inst *so_cldd [0x0A];
! 1145: static const struct inst *so_float[0x04];
! 1146: static const struct inst *so_fstq [0x0A];
! 1147: static const struct inst *so_ebran[0x08];
! 1148: static const struct inst *so_addit[0x02];
! 1149: static const struct inst *so_addi [0x02];
! 1150: static const struct inst *so_subi [0x02];
! 1151: static const struct inst *so_shext[0x08];
! 1152: static const struct inst *so_deps [0x08];
! 1153:
! 1154: #define ILLEG (const struct inst **)&illeg
! 1155: #define NENTS(a) (sizeof(a)/sizeof(a[0])-1)
! 1156: static struct majoropcode majopcs[NMAJOPCS] = {
! 1157: { so_sysop, NENTS(so_sysop) }, /* 00 */
! 1158: { so_mmuop, NENTS(so_mmuop) }, /* 01 */
! 1159: { so_arith, NENTS(so_arith) }, /* 02 */
! 1160: { so_loads, NENTS(so_loads) }, /* 03 */
! 1161: { ILLEG, 1 }, /* 04 */
! 1162: { ILLEG, 1 }, /* 05 */
! 1163: { ILLEG, 1 }, /* 06 */
! 1164: { ILLEG, 1 }, /* 07 */
! 1165: { ILLEG, 1 }, /* 08 */
! 1166: { so_cldw , NENTS(so_cldw ) }, /* 09 */
! 1167: { ILLEG, 1 }, /* 0A */
! 1168: { so_cldd , NENTS(so_cldd ) }, /* 0B */
! 1169: { ILLEG, 1 }, /* 0C */
! 1170: { ILLEG, 1 }, /* 0D */
! 1171: { so_float, NENTS(so_float) }, /* 0E */
! 1172: { so_fstq , NENTS(so_fstq ) }, /* 0F */
! 1173: { ILLEG, 1 }, /* 10 */
! 1174: { ILLEG, 1 }, /* 11 */
! 1175: { ILLEG, 1 }, /* 12 */
! 1176: { ILLEG, 1 }, /* 13 */
! 1177: { ILLEG, 1 }, /* 14 */
! 1178: { ILLEG, 1 }, /* 15 */
! 1179: { ILLEG, 1 }, /* 16 */
! 1180: { ILLEG, 1 }, /* 17 */
! 1181: { ILLEG, 1 }, /* 18 */
! 1182: { ILLEG, 1 }, /* 19 */
! 1183: { ILLEG, 1 }, /* 1A */
! 1184: { ILLEG, 1 }, /* 1B */
! 1185: { ILLEG, 1 }, /* 1C */
! 1186: { ILLEG, 1 }, /* 1D */
! 1187: { ILLEG, 1 }, /* 1E */
! 1188: { ILLEG, 1 }, /* 1F */
! 1189: { ILLEG, 1 }, /* 20 */
! 1190: { ILLEG, 1 }, /* 21 */
! 1191: { ILLEG, 1 }, /* 22 */
! 1192: { ILLEG, 1 }, /* 23 */
! 1193: { ILLEG, 1 }, /* 24 */
! 1194: { so_subi , NENTS(so_subi ) }, /* 25 */
! 1195: { ILLEG, 1 }, /* 26 */
! 1196: { ILLEG, 1 }, /* 27 */
! 1197: { ILLEG, 1 }, /* 28 */
! 1198: { ILLEG, 1 }, /* 29 */
! 1199: { ILLEG, 1 }, /* 2A */
! 1200: { ILLEG, 1 }, /* 2B */
! 1201: { so_addit, NENTS(so_addit) }, /* 2C */
! 1202: { so_addi , NENTS(so_addi ) }, /* 2D */
! 1203: { ILLEG, 1 }, /* 2E */
! 1204: { ILLEG, 1 }, /* 2F */
! 1205: { ILLEG, 1 }, /* 30 */
! 1206: { ILLEG, 1 }, /* 31 */
! 1207: { ILLEG, 1 }, /* 32 */
! 1208: { ILLEG, 1 }, /* 33 */
! 1209: { so_shext, NENTS(so_shext) }, /* 34 */
! 1210: { so_deps , NENTS(so_deps ) }, /* 35 */
! 1211: { ILLEG, 1 }, /* 36 */
! 1212: { ILLEG, 1 }, /* 37 */
! 1213: { ILLEG, 1 }, /* 38 */
! 1214: { ILLEG, 1 }, /* 39 */
! 1215: { so_ebran, NENTS(so_ebran) }, /* 3A */
! 1216: { ILLEG, 1 }, /* 3B */
! 1217: { ILLEG, 1 }, /* 3C */
! 1218: { ILLEG, 1 }, /* 3D */
! 1219: { ILLEG, 1 }, /* 3E */
! 1220: { ILLEG, 1 }, /* 3F */
! 1221: };
! 1222: #undef NENTS
! 1223: #undef ILLEG
! 1224:
! 1225: /*--------------------------------------------------------------------------
! 1226: * instruction$ExecutionInitialize - Initialize the instruction execution
! 1227: * data structures.
! 1228: *---------------------------------------------------------------------------*/
! 1229: int
! 1230: iExInit(void)
! 1231: {
! 1232: static int unasm_initted = 0;
! 1233: register const struct inst *i;
! 1234: register struct majoropcode *m;
! 1235: u_int shft, mask;
! 1236:
! 1237: if (unasm_initted)
! 1238: return 0;
! 1239:
! 1240: /*
! 1241: * Determine maxsubop for each major opcode.
! 1242: * Also, check all instructions of a given major opcode
! 1243: * for consistent opcode extension field definition, and
! 1244: * save a converted form of this definition in the majopcs
! 1245: * entry for this major opcode.
! 1246: */
! 1247: for (i = &instrs[0]; *i->mnem; i++) {
! 1248: m = &majopcs[i->majopc];
! 1249: if (m->maxsubop < i->opcext)
! 1250: panic("iExInit not enough space for opcode %d",
! 1251: i->majopc);
! 1252: shft = 32 - i->extbs - i->extbl;
! 1253: mask = (1 << i->extbl) - 1;
! 1254: if (m->extshft || m->extmask) {
! 1255: if (m->extshft != shft || m->extmask != mask) {
! 1256: db_printf("%s - Bad instruction initialization!\n", i->mnem);
! 1257: return (0);
! 1258: }
! 1259: } else {
! 1260: m->extshft = shft;
! 1261: m->extmask = mask;
! 1262: }
! 1263: }
! 1264:
! 1265: /*
! 1266: * Lastly, fill in all legal subops with the appropriate info.
! 1267: */
! 1268: for (i = &instrs[0]; *i->mnem; i++) {
! 1269: m = &majopcs[i->majopc];
! 1270: if (m->maxsubop == 1)
! 1271: m->subops = (const struct inst **)i;
! 1272: else
! 1273: m->subops[i->opcext] = i;
! 1274: }
! 1275:
! 1276: unasm_initted++;
! 1277: return (1);
! 1278: }
! 1279:
! 1280:
! 1281:
! 1282: /*##################### Functions and Subroutines ##########################*/
! 1283:
! 1284: /**************************************/
! 1285: /* Miscellaneous Disassembly Routines */
! 1286: /**************************************/
! 1287:
! 1288: /* Add instructions */
! 1289: int
! 1290: addDasm(i, ofs, w)
! 1291: const struct inst *i;
! 1292: OFS ofs;
! 1293: int w;
! 1294: {
! 1295: db_printf("%s\t%%r%d,%%r%d,%%r%d",addDCond(Cond4(w)),
! 1296: Rsa(w),Rsb(w),Rtc(w));
! 1297: return (1);
! 1298: }
! 1299:
! 1300: /* Unit instructions */
! 1301: int
! 1302: unitDasm(i, ofs, w)
! 1303: const struct inst *i;
! 1304: OFS ofs;
! 1305: int w;
! 1306: {
! 1307: db_printf(unitDCond(Cond4(w)));
! 1308: if (Match("dcor") || Match("idcor"))
! 1309: db_printf("\t%%r%d,%%r%d",Rsb(w),Rtc(w));
! 1310: else
! 1311: db_printf("\t%%r%d,%%r%d,%%r%d",Rsa(w),Rsb(w),Rtc(w));
! 1312: return (1);
! 1313: }
! 1314:
! 1315: /* Immediate Arithmetic instructions */
! 1316: int
! 1317: iaDasm(i, ofs, w)
! 1318: const struct inst *i;
! 1319: OFS ofs;
! 1320: int w;
! 1321: {
! 1322: if (Match("addi"))
! 1323: db_printf("%s\t%d,%%r%d,%%r%d",
! 1324: addDCond(Cond4(w)),Im11(w),Rsb(w),Rta(w));
! 1325: else
! 1326: db_printf("%s\t%d,%%r%d,%%r%d",
! 1327: subDCond(Cond4(w)),Im11(w),Rsb(w),Rta(w));
! 1328: return (1);
! 1329: }
! 1330:
! 1331: /* Shift double instructions */
! 1332: int
! 1333: shdDasm(i, ofs, w)
! 1334: const struct inst *i;
! 1335: OFS ofs;
! 1336: int w;
! 1337: {
! 1338: if (Match("vshd"))
! 1339: db_printf("%s\t%%r%d,%%r%d,%%r%d",
! 1340: edDCond(Cond(w)), Rsa(w),Rsb(w),Rtc(w));
! 1341: else
! 1342: db_printf("%s\t%%r%d,%%r%d,%d,%%r%d",
! 1343: edDCond(Cond(w)),Rsa(w),Rsb(w),31-Imd5(w),Rtc(w));
! 1344: return (1);
! 1345: }
! 1346:
! 1347: /* Extract instructions */
! 1348: int
! 1349: extrDasm(i, ofs, w)
! 1350: const struct inst *i;
! 1351: OFS ofs;
! 1352: int w;
! 1353: {
! 1354: db_printf("%s\t%%r%d,%d,%d,%%r%d",
! 1355: edDCond(Cond(w)),Rsb(w),Imd5(w),32 - Rsc(w),Rta(w));
! 1356: return (1);
! 1357: }
! 1358:
! 1359:
! 1360: /* Variable extract instructions */
! 1361: int
! 1362: vextrDasm(i, ofs, w)
! 1363: const struct inst *i;
! 1364: OFS ofs;
! 1365: int w;
! 1366: {
! 1367: db_printf("%s\t%%r%d,%d,%%r%d",
! 1368: edDCond(Cond(w)),Rsb(w),32 - Rsc(w),Rta(w));
! 1369: return (1);
! 1370: }
! 1371:
! 1372:
! 1373: /* Deposit instructions */
! 1374: int
! 1375: depDasm(i, ofs, w)
! 1376: const struct inst *i;
! 1377: OFS ofs;
! 1378: int w;
! 1379: {
! 1380: db_printf("%s\t%%r%d,%d,%d,%%r%d",
! 1381: edDCond(Cond(w)),Rsa(w),31 - Imd5(w),32 - Rsc(w),Rtb(w));
! 1382: return (1);
! 1383: }
! 1384:
! 1385:
! 1386: /* Variable deposit instructions */
! 1387: int
! 1388: vdepDasm(i, ofs, w)
! 1389: const struct inst *i;
! 1390: OFS ofs;
! 1391: int w;
! 1392: {
! 1393: db_printf("%s\t%%r%d,%d,%%r%d",
! 1394: edDCond(Cond(w)),Rsa(w),32 - Rsc(w),Rtb(w));
! 1395: return (1);
! 1396: }
! 1397:
! 1398:
! 1399: /* Deposit Immediate instructions */
! 1400: int
! 1401: depiDasm(i, ofs, w)
! 1402: const struct inst *i;
! 1403: OFS ofs;
! 1404: int w;
! 1405: {
! 1406: db_printf("%s\t%d,%d,%d,%%r%d",
! 1407: edDCond(Cond(w)),Ima5(w),31 - Imd5(w),32 - Imc5A(w),Rtb(w));
! 1408: return (1);
! 1409: }
! 1410:
! 1411: /* Variable Deposit Immediate instructions */
! 1412: int
! 1413: vdepiDasm(i, ofs, w)
! 1414: const struct inst *i;
! 1415: OFS ofs;
! 1416: int w;
! 1417: {
! 1418: db_printf("%s\t%d,%d,%%r%d",edDCond(Cond(w)),Ima5(w),32-Imc5A(w),Rtb(w));
! 1419: return (1);
! 1420: }
! 1421:
! 1422: /*---------------------------------------------------------------------------
! 1423: * conditionType$DisassembleCondition - Return a string which contains the
! 1424: * ascii description of the passed numeric condition.
! 1425: *---------------------------------------------------------------------------*/
! 1426:
! 1427: char *
! 1428: subDCond(cond)
! 1429: u_int cond;
! 1430: {
! 1431: switch(cond) {
! 1432: case EQZ: return(",=");
! 1433: case LT: return(",<");
! 1434: case LE: return(",<=");
! 1435: case LLT: return(",<<");
! 1436: case LLE: return(",<<=");
! 1437: case SV: return(",sv");
! 1438: case OD: return(",od");
! 1439: case NEQZ: return(",<>");
! 1440: case GE: return(",>=");
! 1441: case GT: return(",>");
! 1442: case LGE: return(",>>=");
! 1443: case LGT: return(",>>");
! 1444: case NSV: return(",nsv");
! 1445: case EV: return(",ev");
! 1446: case TR: return(",tr");
! 1447: case NEV: return("");
! 1448: default:
! 1449: panic("subDCond: unknown condition");
! 1450: }
! 1451: }
! 1452:
! 1453:
! 1454: /*---------------------------------------------------------------------------
! 1455: * conditionType$DisassembleCondition - Return a string which contains the
! 1456: * ascii description of the passed numeric condition.
! 1457: *---------------------------------------------------------------------------*/
! 1458:
! 1459: char *
! 1460: addDCond(cond)
! 1461: u_int cond;
! 1462: {
! 1463: switch(cond) {
! 1464: case EQZ: return(",=");
! 1465: case LT: return(",<");
! 1466: case LE: return(",<=");
! 1467: case NUV: return(",nuv");
! 1468: case ZNV: return(",znv");
! 1469: case SV: return(",sv");
! 1470: case OD: return(",od");
! 1471: case NEQZ: return(",<>");
! 1472: case GE: return(",>=");
! 1473: case GT: return(",>");
! 1474: case UV: return(",uv");
! 1475: case VNZ: return(",vnz");
! 1476: case NSV: return(",nsv");
! 1477: case EV: return(",ev");
! 1478: case TR: return(",tr");
! 1479: case NEV: return("");
! 1480: default:
! 1481: panic("addDCond: unknown condition");
! 1482: }
! 1483: }
! 1484:
! 1485: char *
! 1486: unitDCond(cond)
! 1487: u_int cond;
! 1488: {
! 1489: switch(cond) {
! 1490: case SHC: return(",shc");
! 1491: case SHZ: return(",shz");
! 1492: case SBC: return(",sbc");
! 1493: case SBZ: return(",sbz");
! 1494: case SDC: return(",sdc");
! 1495: case NHC: return(",nhc");
! 1496: case NHZ: return(",nhz");
! 1497: case NBC: return(",nbc");
! 1498: case NBZ: return(",nbz");
! 1499: case NDC: return(",ndc");
! 1500: case TR: return(",tr");
! 1501: case NEV: return("");
! 1502: default:
! 1503: panic("unitDCond: unknown condition");
! 1504: }
! 1505: }
! 1506:
! 1507: char *
! 1508: edDCond(cond)
! 1509: u_int cond;
! 1510: {
! 1511: switch(cond) {
! 1512: case XOD: return(",od");
! 1513: case XTR: return(",tr");
! 1514: case XNE: return(",<>");
! 1515: case XLT: return(",<");
! 1516: case XEQ: return(",=");
! 1517: case XGE: return(",>=");
! 1518: case XEV: return(",ev");
! 1519: case NEV: return("");
! 1520: default:
! 1521: panic("edDCond: unknown condition");
! 1522: }
! 1523: }
! 1524:
! 1525:
! 1526:
! 1527: /****************************************/
! 1528: /* Format Specific Disassembly Routines */
! 1529: /****************************************/
! 1530:
! 1531:
! 1532: /* Load [modify] instructions */
! 1533: int
! 1534: ldDasm(i, ofs, w)
! 1535: const struct inst *i;
! 1536: OFS ofs;
! 1537: int w;
! 1538: {
! 1539: register int d = Disp(w);
! 1540: char s[2];
! 1541:
! 1542: s[1] = '\0';
! 1543: if (d < 0) {
! 1544: d = -d;
! 1545: s[0] = '-';
! 1546: } else
! 1547: s[0] = '\0';
! 1548:
! 1549: if (Rsb(w) == 0 && Match("ldo")) {
! 1550: db_printf("ldi\t%s%X,%%r%d",s,d,Rta(w));
! 1551: return (1);
! 1552: }
! 1553: db_printf("%s\t%s%s%X",i->mnem,(d < 2048? "R'":""), s, d);
! 1554: if (Dss(w))
! 1555: db_printf("(%%sr%d,%%r%d),%%r%d",Dss(w),Rsb(w),Rta(w));
! 1556: else
! 1557: db_printf("(%%r%d),%%r%d",Rsb(w),Rta(w));
! 1558: return (1);
! 1559: }
! 1560:
! 1561: /* Store [modify] instructions */
! 1562: int
! 1563: stDasm(i, ofs, w)
! 1564: const struct inst *i;
! 1565: OFS ofs;
! 1566: int w;
! 1567: {
! 1568: register int d = Disp(w);
! 1569: char s[2];
! 1570:
! 1571: db_printf("\t%%r%d,",Rta(w));
! 1572:
! 1573: s[1] = '\0';
! 1574: if (d < 0) {
! 1575: d = -d;
! 1576: s[0] = '-';
! 1577: } else
! 1578: s[0] = '\0';
! 1579:
! 1580: db_printf("%s%s%X", (d < 2048? "R'":""), s, d);
! 1581:
! 1582: if (Dss(w))
! 1583: db_printf("(%%sr%d,%%r%d)",Dss(w),Rsb(w));
! 1584: else
! 1585: db_printf("(%%r%d)",Rsb(w));
! 1586: return (1);
! 1587: }
! 1588:
! 1589: /* Load indexed instructions */
! 1590: int
! 1591: ldxDasm(i, ofs, w)
! 1592: const struct inst *i;
! 1593: OFS ofs;
! 1594: int w;
! 1595: {
! 1596: register const char *p;
! 1597:
! 1598: if (ShortDisp(w)) {
! 1599: db_printf("s");
! 1600: if (Modify(w))
! 1601: db_printf(",m%s", ModBefore(w)? "b": "a");
! 1602: } else {
! 1603: db_printf("x");
! 1604: if (Modify(w))
! 1605: db_printf(",%sm", IndxShft(w)? "s":"");
! 1606: }
! 1607: switch (CacheCtrl(w)) {
! 1608: case NOACTION: p = ""; break;
! 1609: case STACKREF: p = ",c"; break;
! 1610: case SEQPASS: p = ",q"; break;
! 1611: case PREFETCH: p = ",p"; break;
! 1612: }
! 1613: if (ShortDisp(w))
! 1614: db_printf("%s\t%d", p, Ima5(w));
! 1615: else
! 1616: db_printf("%s\t%%r%d", p, Rsa(w));
! 1617:
! 1618: if (Dss(w))
! 1619: db_printf("(%%sr%d,%%r%d),%%r%d",Dss(w),Rsb(w),Rtc(w));
! 1620: else
! 1621: db_printf("(%%r%d),%%r%d",Rsb(w),Rtc(w));
! 1622: return (1);
! 1623: }
! 1624:
! 1625: /* Store short displacement instructions */
! 1626: int
! 1627: stsDasm(i, ofs, w)
! 1628: const struct inst *i;
! 1629: OFS ofs;
! 1630: int w;
! 1631: {
! 1632: register const char *p;
! 1633: if (Modify(w))
! 1634: db_printf(",m%s", ModBefore(w)? "b":"a");
! 1635:
! 1636: switch (CacheCtrl(w)) {
! 1637: case NOACTION: p = ""; break;
! 1638: case STACKREF: p = ",c"; break;
! 1639: case SEQPASS: p = ",q"; break;
! 1640: case PREFETCH: p = ",p"; break;
! 1641: }
! 1642: db_printf("%s\t%%r%d,", p, Rta(w));
! 1643: if (Dss(w))
! 1644: db_printf("%d(%%sr%d,%%r%d)",Imc5(w),Dss(w),Rsb(w));
! 1645: else
! 1646: db_printf("%d(%%r%d)",Imc5(w),Rsb(w));
! 1647: return (1);
! 1648: }
! 1649:
! 1650: /* Store Bytes Instruction */
! 1651: int
! 1652: stbysDasm(i, ofs, w)
! 1653: const struct inst *i;
! 1654: OFS ofs;
! 1655: int w;
! 1656: {
! 1657: register const char *p;
! 1658: db_printf(ModBefore(w)? ",e":",b");
! 1659: if (Modify(w))
! 1660: db_printf(",m");
! 1661: switch (CacheCtrl(w)) {
! 1662: case NOACTION: p = ""; break;
! 1663: case STACKREF: p = ",f"; break;
! 1664: case SEQPASS: p = ",r"; break;
! 1665: case PREFETCH: p = ",z"; break;
! 1666: }
! 1667: db_printf("%s\t%%r%d,", p, Rta(w));
! 1668: if (Dss(w))
! 1669: db_printf("%d(%%sr%d,%%r%d)",Imc5(w),Dss(w),Rsb(w));
! 1670: else
! 1671: db_printf("%d(%%r%d)",Imc5(w),Rsb(w));
! 1672: return (1);
! 1673: }
! 1674:
! 1675: /* Long Immediate instructions */
! 1676: int
! 1677: limmDasm(i, ofs, w)
! 1678: const struct inst *i;
! 1679: OFS ofs;
! 1680: int w;
! 1681: {
! 1682: db_printf("\tL'%X,%%r%d", Im21(w), Rtb(w));
! 1683: return (1);
! 1684: }
! 1685:
! 1686:
! 1687: /* Branch and Link instruction(s) (Branch, too!!) */
! 1688: int
! 1689: blDasm(i, ofs, w)
! 1690: const struct inst *i;
! 1691: OFS ofs;
! 1692: int w;
! 1693: {
! 1694: register OFS tgtofs = ofs + 8 + Bdisp(w);
! 1695: register u_int link = Rtb(w);
! 1696:
! 1697: if (link && !Match("gate"))
! 1698: db_printf("l");
! 1699: if (Nu(w))
! 1700: db_printf(",n");
! 1701: db_printf("\t");
! 1702:
! 1703: db_printsym((db_addr_t)tgtofs, DB_STGY_ANY, db_printf);
! 1704:
! 1705: if (link || Match("gate"))
! 1706: db_printf(",%%r%d",link);
! 1707:
! 1708: return (1);
! 1709: }
! 1710:
! 1711: /* Branch Register instruction */
! 1712: int
! 1713: brDasm(i, ofs, w)
! 1714: const struct inst *i;
! 1715: OFS ofs;
! 1716: int w;
! 1717: {
! 1718: db_printf("%s\t%%r%d,%%r%d", Nu(w)?",n":"", Rsa(w), Rtb(w));
! 1719: return (1);
! 1720: }
! 1721:
! 1722: /* Dispatch instructions */
! 1723: int
! 1724: bvDasm(i, ofs, w)
! 1725: const struct inst *i;
! 1726: OFS ofs;
! 1727: int w;
! 1728: {
! 1729: db_printf("%s\t%%r%d(%%r%d)", Nu(w)?",n":"", Rsa(w), Rsb(w));
! 1730: return (1);
! 1731: }
! 1732:
! 1733: /* Branch External instructions */
! 1734: int
! 1735: beDasm(i, ofs, w)
! 1736: const struct inst *i;
! 1737: OFS ofs;
! 1738: int w;
! 1739: {
! 1740: register int d = Bdisp(w);
! 1741: register const char *p;
! 1742: char s[2];
! 1743:
! 1744: s[1] = '\0';
! 1745: if (d < 0) {
! 1746: d = -d;
! 1747: s[0] = '-';
! 1748: } else
! 1749: s[0] = '\0';
! 1750:
! 1751: p = Nu(w)? ",n":"";
! 1752: db_printf("%s\tR'%s%X(%%sr%d,%%r%d)", p, s, d, Sr(w), Rsb(w));
! 1753: return (1);
! 1754: }
! 1755:
! 1756:
! 1757: /* Compare/Add and Branch instructions */
! 1758: int
! 1759: cbDasm(i, ofs, w)
! 1760: const struct inst *i;
! 1761: OFS ofs;
! 1762: int w;
! 1763: {
! 1764: register OFS tgtofs = ofs + 8 + Cbdisp(w);
! 1765:
! 1766: if (Match("movb"))
! 1767: db_printf(edDCond(Cond(w)));
! 1768: else if (Match("addb"))
! 1769: db_printf(addDCond(Cond(w) << 1));
! 1770: else
! 1771: db_printf(subDCond(Cond(w) << 1));
! 1772: db_printf("%s\t%%r%d,%%r%d,", Nu(w)?",n":"", Rsa(w), Rsb(w));
! 1773: db_printsym((db_addr_t)tgtofs, DB_STGY_ANY, db_printf);
! 1774: return (1);
! 1775: }
! 1776:
! 1777: /* Compare/Add and Branch Immediate instructions */
! 1778: int
! 1779: cbiDasm(i, ofs, w)
! 1780: const struct inst *i;
! 1781: OFS ofs;
! 1782: int w;
! 1783: {
! 1784: register OFS tgtofs = ofs + 8 + Cbdisp(w);
! 1785:
! 1786: if (Match("movib"))
! 1787: db_printf(edDCond(Cond(w)));
! 1788: else if (Match("addib"))
! 1789: db_printf(addDCond(Cond(w) << 1));
! 1790: else
! 1791: db_printf(subDCond(Cond(w) << 1));
! 1792: db_printf("%s\t%d,%%r%d,", Nu(w)? ",n":"", Ima5(w), Rsb(w));
! 1793: db_printsym((db_addr_t)tgtofs, DB_STGY_ANY, db_printf);
! 1794: return (1);
! 1795: }
! 1796:
! 1797: /* Branch on Bit instructions */
! 1798: int
! 1799: bbDasm(i, ofs, w)
! 1800: const struct inst *i;
! 1801: OFS ofs;
! 1802: int w;
! 1803: {
! 1804: register OFS tgtofs = ofs + 8 + Cbdisp(w);
! 1805: register const char *p;
! 1806:
! 1807: db_printf(edDCond(Cond(w)));
! 1808: p = Nu(w)? ",n":"";
! 1809: if (Match("bvb"))
! 1810: db_printf("%s\t%%r%d,", p, Rta(w));
! 1811: else
! 1812: db_printf("%s\t%%r%d,%d,", p, Rsa(w), Imb5(w));
! 1813: db_printsym((db_addr_t)tgtofs, DB_STGY_ANY, db_printf);
! 1814: return (1);
! 1815: }
! 1816:
! 1817: /* Arithmetic instructions */
! 1818: int
! 1819: ariDasm(i, ofs, w)
! 1820: const struct inst *i;
! 1821: OFS ofs;
! 1822: int w;
! 1823: {
! 1824: if (Match("or") && Rsb(w) == 0 && Cond4(w) == NEV) {
! 1825: if (Rsa(w) == 0 && Rtc(w) == 0)
! 1826: db_printf("nop");
! 1827: else
! 1828: db_printf("copy\t%%r%d,%%r%d",Rsa(w),Rtc(w));
! 1829: } else
! 1830: db_printf("%s%s\t%%r%d,%%r%d,%%r%d", i->mnem,
! 1831: subDCond(Cond4(w)), Rsa(w),Rsb(w),Rtc(w));
! 1832: return(1);
! 1833: }
! 1834:
! 1835: /* System control operations */
! 1836: int
! 1837: scDasm(i, ofs, w)
! 1838: const struct inst *i;
! 1839: OFS ofs;
! 1840: int w;
! 1841: {
! 1842: if (Match("mtctl")) {
! 1843: if (Rtb(w) == 11)
! 1844: db_printf("mtsar\t%%r%d",Rsa(w));
! 1845: else
! 1846: db_printf("mtctl\t%%r%d,%%cr%d",Rsa(w),Rtb(w));
! 1847: return (1);
! 1848: }
! 1849: db_printf(i->mnem);
! 1850: if (Match("ssm") || Match("rsm"))
! 1851: db_printf("\t%d,%%r%d",Ima5A(w),Rtc(w));
! 1852: else if (Match("mtsm")) db_printf("\t%%r%d",Rsa(w));
! 1853: else if (Match("ldprid")) db_printf("\t%%r%d",Rtc(w));
! 1854: else if (Match("mtsp")) db_printf("\t%%r%d,%%sr%d",Rsa(w),Sr(w));
! 1855: else if (Match("mfsp")) db_printf("\t%%sr%d,%%r%d",Sr(w),Rtc(w));
! 1856: else if (Match("mfctl")) db_printf("\t%%cr%d,%%r%d",Rsb(w),Rtc(w));
! 1857: else if (Match("ldsid")) {
! 1858: if (Dss(w))
! 1859: db_printf("\t(%%sr%d,%%r%d),%%r%d",Dss(w),Rsb(w),Rtc(w));
! 1860: else
! 1861: db_printf("\t(%%r%d),%%r%d",Rsb(w),Rtc(w));
! 1862: } else
! 1863: return (0);
! 1864:
! 1865: return (1);
! 1866: }
! 1867:
! 1868: /* Instruction cache/tlb control instructions */
! 1869: int
! 1870: mmgtDasm(i, ofs, w)
! 1871: const struct inst *i;
! 1872: OFS ofs;
! 1873: int w;
! 1874: {
! 1875: if (Match("probe")) {
! 1876: if (ProbeI(w)) {
! 1877: if (Dss(w))
! 1878: db_printf("i\t(%%sr%d,%%r%d),%d,%%r%d",
! 1879: Dss(w),Rsb(w),Rsa(w),Rtc(w));
! 1880: else
! 1881: db_printf("i\t(%%r%d),%d,%%r%d",
! 1882: Rsb(w),Rsa(w),Rtc(w));
! 1883: } else {
! 1884: if (Dss(w))
! 1885: db_printf("\t(%%sr%d,%%r%d),%%r%d,%%r%d",
! 1886: Dss(w),Rsb(w),Rsa(w),Rtc(w));
! 1887: else
! 1888: db_printf("\t(%%r%d),%%r%d,%%r%d",
! 1889: Rsb(w),Rsa(w),Rtc(w));
! 1890: }
! 1891: }
! 1892: else if (Match("lha") || Match("lpa")) {
! 1893: if (Modify(w))
! 1894: db_printf(",m");
! 1895: if (Dss(w))
! 1896: db_printf("\t%%r%d(%%sr%d,%%r%d),%%r%d",
! 1897: Rsa(w),Dss(w),Rsb(w),Rtc(w));
! 1898: else
! 1899: db_printf("\t%%r%d(%%r%d),%%r%d",Rsa(w),Rsb(w),Rtc(w));
! 1900: }
! 1901: else if (Match("pdtlb") || Match("pdc") || Match("fdc")) {
! 1902: if (Modify(w)) db_printf(",m");
! 1903: if (Dss(w))
! 1904: db_printf("\t%%r%d(%%sr%d,%%r%d)",Rsa(w),Dss(w),Rsb(w));
! 1905: else
! 1906: db_printf("\t%%r%d(%%r%d)",Rsa(w),Rsb(w));
! 1907: }
! 1908: else if (Match("pitlb") || Match("fic")) {
! 1909: if (Modify(w))
! 1910: db_printf(",m");
! 1911: db_printf("\t%%r%d(%%sr%d,%%r%d)",Rsa(w),Sr(w),Rsb(w));
! 1912: }
! 1913: else if (Match("idtlb")) {
! 1914: if (Dss(w))
! 1915: db_printf("\t%%r%d,(%%sr%d,%%r%d)",Rsa(w),Dss(w),Rsb(w));
! 1916: else
! 1917: db_printf("\t%%r%d,(%%r%d)",Rsa(w),Rsb(w));
! 1918: }
! 1919: else if (Match("iitlb"))
! 1920: db_printf("\t%%r%d,(%%sr%d,%%r%d)",Rsa(w),Sr(w),Rsb(w));
! 1921: else
! 1922: return (0);
! 1923:
! 1924: return(1);
! 1925: }
! 1926:
! 1927: /* break instruction */
! 1928: int
! 1929: brkDasm(i, ofs, w)
! 1930: const struct inst *i;
! 1931: OFS ofs;
! 1932: int w;
! 1933: {
! 1934: db_printf("\t%d,%d",Bi1(w),Bi2(w));
! 1935: return (1);
! 1936: }
! 1937:
! 1938: int
! 1939: floatDasm(i, ofs, w)
! 1940: const struct inst *i;
! 1941: OFS ofs;
! 1942: int w;
! 1943: {
! 1944: register u_int op1, r1, fmt, t;
! 1945: u_int op2, r2, dfmt;
! 1946: char *p;
! 1947:
! 1948: op1 = CoprExt1(w);
! 1949: op2 = CoprExt2(w);
! 1950: fmt = (op1 >> 2) & 3; /* get precision of source */
! 1951:
! 1952: #define ST(r) ((fmt & 1)? fdreg[(r)]:fsreg[(r)])
! 1953: /*
! 1954: * get first (or only) source register
! 1955: * (independent of class)
! 1956: */
! 1957: r1 = (op1 >> 11) & 0x3e;
! 1958: if ((fmt & 1) == 0 && (Uid(w) & 2))
! 1959: r1++;
! 1960:
! 1961: if (op1 & 2) { /* class 2 or 3 */
! 1962: /*
! 1963: * get second source register
! 1964: */
! 1965: r2 = (op1 >> 6) & 0x3e;
! 1966: if (fmt == 2)
! 1967: r2++;
! 1968:
! 1969: if ((op1 & 1) == 0) { /* class 2 */
! 1970: /* Opclass 2: 2 sources, no destination */
! 1971: switch((op1 >> 4) & 7) {
! 1972: case 0:
! 1973: p = "cmp";
! 1974: break;
! 1975: default:
! 1976: return(0);
! 1977: }
! 1978: db_printf("%s,%s",p,fmtStrTbl[fmt]);
! 1979: db_printf(",%s\t%%f%s,%%f%s",
! 1980: condStrTbl[op2], ST(r1), ST(r2));
! 1981: return (1);
! 1982: }
! 1983: /*
! 1984: * get target register (class 3)
! 1985: */
! 1986: t = (op2 << 1);
! 1987: if ((fmt & 1) == 0 && (Uid(w) & 1))
! 1988: t++;
! 1989: /* Opclass 3: 2 sources, 1 destination */
! 1990: switch((op1 >> 4) & 7) {
! 1991: case 0: p = "add"; break;
! 1992: case 1: p = "sub"; break;
! 1993: case 2: p = (Fpi(w)) ? "mpyi" : "mpy"; break;
! 1994: case 3: p = "div"; break;
! 1995: case 4: p = "rem"; break;
! 1996: default: return (0);
! 1997: }
! 1998: db_printf("%s,%s", p, fmtStrTbl[fmt]);
! 1999: db_printf("\t%%f%s,%%f%s,%%f%s",ST(r1),ST(r2),ST(t));
! 2000: } else if (op1 & 1) { /* class 1 */
! 2001: dfmt = (op1 >> 4) & 3;
! 2002: #define DT(r) ((dfmt & 1)? fdreg[(r)]:fsreg[(r)])
! 2003:
! 2004: /*
! 2005: * get target register
! 2006: */
! 2007: t = (op2 << 1);
! 2008: if ((dfmt & 1) == 0 && (Uid(w) & 1))
! 2009: t++;
! 2010: /* Opclass 1: 1 source, 1 destination conversions */
! 2011: switch((op1 >> 6) & 3) {
! 2012: case 0: p = "ff"; break;
! 2013: case 1: p = "xf"; break;
! 2014: case 2: p = "fx"; break;
! 2015: case 3: p = "fxt"; break;
! 2016: }
! 2017: db_printf("%s,%s", p, fmtStrTbl[fmt]);
! 2018: db_printf(",%s\t%%f%s,%%f%s",fmtStrTbl[dfmt],ST(r1),DT(t));
! 2019: } else { /* class 0 */
! 2020: /*
! 2021: * get target register
! 2022: */
! 2023: t = (op2 << 1);
! 2024: if ((fmt & 1) == 0 && (Uid(w) & 1))
! 2025: t++;
! 2026: /* Opclass 0: 1 source, 1 destination */
! 2027: switch((op1 >> 4) & 7) {
! 2028: case 1: p = "rsqrt"; break;
! 2029: case 2: p = "cpy"; break;
! 2030: case 3: p = "abs"; break;
! 2031: case 4: p = "sqrt"; break;
! 2032: case 5: p = "rnd"; break;
! 2033: default: return (0);
! 2034: }
! 2035: db_printf("%s,%s",p,fmtStrTbl[fmt]);
! 2036: db_printf("\t%%f%s,%%f%s",ST(r1),ST(t));
! 2037: }
! 2038: return (1);
! 2039: }
! 2040:
! 2041: int
! 2042: fcoprDasm(w, op1, op2)
! 2043: int w;
! 2044: u_int op1, op2;
! 2045: {
! 2046: register u_int r1, r2, t, fmt, dfmt;
! 2047: register char *p;
! 2048:
! 2049: if (AstNu(w) && op1 == ((1<<4) | 2)) {
! 2050: if (op2 == 0 || op2 == 1 || op2 == 2) {
! 2051: db_printf("ftest");
! 2052: if (op2 == 1)
! 2053: db_printf(",acc");
! 2054: else if (op2 == 2)
! 2055: db_printf(",rej");
! 2056: return (1);
! 2057: }
! 2058: return (0);
! 2059: } else if (0 == op1 && 0 == op2) {
! 2060: db_printf("fcopr identify");
! 2061: return (1);
! 2062: }
! 2063: switch(op1 & 3) {
! 2064: case 0:
! 2065: /* Opclass 0: 1 source, 1 destination */
! 2066: r1 = (op1 >> 12) & 0x1f; t = op2; fmt = (op1 >> 2) & 3;
! 2067: switch((op1 >> 4) & 7) {
! 2068: case 1: p = "rsqrt"; break;
! 2069: case 2: p = "cpy"; break;
! 2070: case 3: p = "abs"; break;
! 2071: case 4: p = "sqrt"; break;
! 2072: case 5: p = "rnd"; break;
! 2073: default: return(0);
! 2074: }
! 2075: db_printf("f%s,%s\t%%fr%d,%%fr%d", p, fmtStrTbl[fmt], r1, t);
! 2076: break;
! 2077: case 1:
! 2078: /* Opclass 1: 1 source, 1 destination conversions */
! 2079: r1 = (op1 >> 12) & 0x1f; t = op2;
! 2080: fmt = (op1 >> 2) & 3; dfmt = (op1 >> 4) & 3;
! 2081: switch((op1 >> 6) & 3) {
! 2082: case 0: p = "ff"; break;
! 2083: case 1: p = "xf"; break;
! 2084: case 2: p = "fx"; break;
! 2085: case 3: p = "fxt"; break;
! 2086: }
! 2087: db_printf("fcnv%s,%s,%s\t%%fr%d,%%fr%d",
! 2088: p, fmtStrTbl[fmt], fmtStrTbl[dfmt], r1, t);
! 2089: break;
! 2090: case 2:
! 2091: /* Opclass 2: 2 sources, no destination */
! 2092: r1 = (op1 >> 12) & 0x1f; r2 = (op1 >> 7) & 0x1f;
! 2093: fmt = (op1 >> 2) & 3;
! 2094: switch((op1 >> 4) & 7) {
! 2095: case 0: p = "fcmp"; break;
! 2096: default: return (0);
! 2097: }
! 2098: db_printf("%s,%s,%s\t%%fr%d,%%fr%d",
! 2099: p,fmtStrTbl[fmt],condStrTbl[op2],r1,r2);
! 2100: break;
! 2101: case 3:
! 2102: /* Opclass 3: 2 sources, 1 destination */
! 2103: r1 = (op1 >> 12) & 0x1f; r2 = (op1 >> 7) & 0x1f; t = op2;
! 2104: fmt = (op1 >> 2) & 3;
! 2105: switch((op1 >> 4) & 7) {
! 2106: case 0: p = "add"; break;
! 2107: case 1: p = "sub"; break;
! 2108: case 2: p = "mpy"; break;
! 2109: case 3: p = "div"; break;
! 2110: case 4: p = "rem"; break;
! 2111: default: return (0);
! 2112: }
! 2113: db_printf("f%s,%s\t%%fr%d,%%fr%d,%%fr%d",
! 2114: p, fmtStrTbl[fmt], r1, r2, t);
! 2115: break;
! 2116: default:
! 2117: return(0);
! 2118: }
! 2119: return (1);
! 2120: }
! 2121:
! 2122: int
! 2123: coprDasm(i, ofs, w)
! 2124: const struct inst *i;
! 2125: OFS ofs;
! 2126: int w;
! 2127: {
! 2128: register u_int uid = Uid(w);
! 2129: register int load = 0;
! 2130: register char *pfx = uid > 1 ? "c" : "f";
! 2131: register int dreg = 0;
! 2132:
! 2133: if (Match("copr")) {
! 2134: if (uid) {
! 2135: db_printf("copr,%d,0x%x",uid,CoprExt(w));
! 2136: if (AstNu(w))
! 2137: db_printf(",n");
! 2138: return (1);
! 2139: }
! 2140: return fcoprDasm(w, CoprExt1(w),CoprExt2(w));
! 2141: }
! 2142: if (Match("cldd")) {
! 2143: dreg = 1;
! 2144: load = 1;
! 2145: db_printf("%sldd",pfx);
! 2146: } else if (Match("cldw")) {
! 2147: load = 1;
! 2148: db_printf("%sldw",pfx);
! 2149: } else if (Match("cstd")) {
! 2150: dreg = 1;
! 2151: db_printf("%sstd",pfx);
! 2152: } else if (Match("cstw"))
! 2153: db_printf("%sstw",pfx);
! 2154: else
! 2155: return (0);
! 2156:
! 2157: if (ShortDisp(w)) {
! 2158: db_printf("s");
! 2159: if (AstNu(w))
! 2160: db_printf(",m%s", ModBefore(w)?"b":"a");
! 2161: }
! 2162: else {
! 2163: db_printf("x");
! 2164: if (AstNu(w))
! 2165: db_printf(",%sm", IndxShft(w)?"s":"");
! 2166: else if (IndxShft(w))
! 2167: db_printf(",s");
! 2168: }
! 2169: switch (CacheCtrl(w)) {
! 2170: case NOACTION: break;
! 2171: case STACKREF: db_printf(",c"); break;
! 2172: case SEQPASS: db_printf(",q"); break;
! 2173: case PREFETCH: db_printf(",p"); break;
! 2174: }
! 2175: if (load) {
! 2176: register const char *p;
! 2177:
! 2178: if (dreg)
! 2179: p = fdreg[(Rtc(w)<<1)+(uid&1)];
! 2180: else
! 2181: p = fsreg[(Rtc(w)<<1)+(uid&1)];
! 2182:
! 2183: if (ShortDisp(w))
! 2184: db_printf("\t%d",Ima5(w));
! 2185: else
! 2186: db_printf("\t%%r%d",Rsa(w));
! 2187: if (Dss(w))
! 2188: db_printf("(%%sr%d,%%r%d),%%f%s", Dss(w),Rsb(w), p);
! 2189: else
! 2190: db_printf("(%%r%d),%%f%s",Rsb(w), p);
! 2191: } else {
! 2192: register const char *p;
! 2193:
! 2194: if (dreg)
! 2195: p = fdreg[(Rsc(w)<<1)+(uid&1)];
! 2196: else
! 2197: p = fsreg[(Rsc(w)<<1)+(uid&1)];
! 2198:
! 2199: if (ShortDisp(w))
! 2200: db_printf("\t%%f%s,%d", p, Ima5(w));
! 2201: else
! 2202: db_printf("\t%%f%s,%%r%d", p, Rta(w));
! 2203: if (Dss(w))
! 2204: db_printf("(%%sr%d,%%r%d)",Dss(w),Rsb(w));
! 2205: else
! 2206: db_printf("(%%r%d)",Rsb(w));
! 2207: }
! 2208: return (1);
! 2209: }
! 2210:
! 2211: int
! 2212: lpkDasm(i, ofs, w)
! 2213: const struct inst *i;
! 2214: OFS ofs;
! 2215: int w;
! 2216: {
! 2217: /*
! 2218: * Floating point STore Quad
! 2219: * Short or Indexed
! 2220: */
! 2221: if (ShortDisp(w)) {
! 2222: if (Modify(w))
! 2223: db_printf(",m%s", ModBefore(w)?"b":"a");
! 2224: } else {
! 2225: if (Modify(w))
! 2226: db_printf(",%sm", IndxShft(w)? "s":"");
! 2227: else if (IndxShft(w))
! 2228: db_printf(",s");
! 2229: }
! 2230: switch (CacheCtrl(w)) {
! 2231: case NOACTION: break;
! 2232: case STACKREF: db_printf(",c"); break;
! 2233: case SEQPASS: db_printf(",q"); break;
! 2234: case PREFETCH: db_printf(",p"); break;
! 2235: }
! 2236: if (ShortDisp(w))
! 2237: db_printf("\t%%fr%d,%d",Rsc(w),Ima5(w));
! 2238: else
! 2239: db_printf("\t%%fr%d,%%r%d",Rsc(w),Rta(w));
! 2240: if (Dss(w))
! 2241: db_printf("(%%sr%d,%%r%d)",Dss(w),Rsb(w));
! 2242: else
! 2243: db_printf("(%%r%d)",Rsb(w));
! 2244: return (1);
! 2245: }
! 2246:
! 2247: int
! 2248: diagDasm(i, ofs, w)
! 2249: const struct inst *i;
! 2250: OFS ofs;
! 2251: int w;
! 2252: {
! 2253: if (0x0b0 == BitfR(w,19,8,_b198)) /* mtcpu */
! 2254: db_printf("mtcpu\t%%r%d,%%dr%d", Rsa(w), Rtb(w));
! 2255: else if (0x0d0 == BitfR(w,19,8,_b198)) /* mfcpu */
! 2256: db_printf("mfcpu\t%%dr%d,%%r%d", Rsb(w), Rta(w));
! 2257: else {
! 2258: db_printf(i->mnem);
! 2259: if (Match("diag"))
! 2260: db_printf("\t0x%X",w & 0x03ffffff);
! 2261: else
! 2262: return (0);
! 2263: }
! 2264: return (1);
! 2265: }
! 2266:
! 2267: int
! 2268: fmpysubDasm(i, ofs, w)
! 2269: const struct inst *i;
! 2270: OFS ofs;
! 2271: int w;
! 2272: {
! 2273: if (SinglePrec(w))
! 2274: db_printf("SUB,SGL\t%%f%s,%%f%s,%%f%s,%%f%s,%%f%s",
! 2275: fsreg[Ms1(w)], fsreg[Ms2(w)], fsreg[Mt(w)],
! 2276: fsreg[As(w)], fsreg[Ad(w)]);
! 2277: else
! 2278: db_printf("SUB,DBL\t%%f%s,%%f%s,%%f%s,%%f%s,%%f%s",
! 2279: fdreg[Ms1(w)], fdreg[Ms2(w)], fdreg[Mt(w)],
! 2280: fdreg[As(w)], fdreg[Ad(w)]);
! 2281: return (1);
! 2282: }
! 2283:
! 2284: int
! 2285: fmpyaddDasm(i, ofs, w)
! 2286: const struct inst *i;
! 2287: OFS ofs;
! 2288: int w;
! 2289: {
! 2290: register const char
! 2291: *ms1 = SinglePrec(w) ? fsreg[Ms1(w)] : fdreg[Ms1(w)],
! 2292: *ms2 = SinglePrec(w) ? fsreg[Ms2(w)] : fdreg[Ms2(w)],
! 2293: *mt = SinglePrec(w) ? fsreg[Mt(w)] : fdreg[Mt(w)],
! 2294: *as = SinglePrec(w) ? fsreg[As(w)] : fdreg[As(w)],
! 2295: *ad = SinglePrec(w) ? fsreg[Ad(w)] : fdreg[Ad(w)];
! 2296:
! 2297: if (Rsd(w) == 0)
! 2298: db_printf("\t%%fcfxt,%s,%%f%s,%%f%s,%%f%s",
! 2299: ((SinglePrec(w)) ? "sgl" : "dbl"), ms1, ms2, mt);
! 2300: else
! 2301: db_printf("add%s\t%%f%s,%%f%s,%%f%s,%%f%s,%%f%s",
! 2302: ((SinglePrec(w)) ? "sgl" : "dbl"), ms1, ms2, mt, as, ad);
! 2303:
! 2304: return (1);
! 2305: }
! 2306:
! 2307: vaddr_t
! 2308: db_disasm(loc, flag)
! 2309: vaddr_t loc;
! 2310: boolean_t flag;
! 2311: {
! 2312: register const struct inst *i;
! 2313: register const struct majoropcode *m;
! 2314: register u_int ext;
! 2315: int ok, instruct;
! 2316: OFS ofs = 0;
! 2317:
! 2318: iExInit();
! 2319: /* TODO if (loc == PC_REGS(&ddb_regs) && ddb_regs.tf_iir)
! 2320: instruct = ddb_regs.tf_iir;
! 2321: else */ if (USERMODE(loc)) {
! 2322: if (copyin((caddr_t)(loc &~ HPPA_PC_PRIV_MASK),
! 2323: &instruct, sizeof(instruct)))
! 2324: instruct = 0;
! 2325: } else
! 2326: instruct = *(int *)loc;
! 2327:
! 2328: ok = 0;
! 2329: m = &majopcs[Opcode(instruct)];
! 2330: ext = OpExt(instruct, m);
! 2331: if (ext <= m->maxsubop) {
! 2332: /* special hack for majopcs table layout */
! 2333: if (m->maxsubop == 1)
! 2334: i = (const struct inst *)m->subops;
! 2335: else
! 2336: i = m->subops[ext];
! 2337:
! 2338: if (i && i->mnem[0] != '?') {
! 2339: if (i->dasmfcn != coprDasm && i->dasmfcn != diagDasm &&
! 2340: i->dasmfcn != ariDasm && i->dasmfcn != scDasm &&
! 2341: i->dasmfcn != ldDasm)
! 2342: db_printf(i->mnem);
! 2343: if (i->dasmfcn)
! 2344: ok = (*i->dasmfcn)(i, ofs, instruct);
! 2345: }
! 2346: }
! 2347:
! 2348: if (!ok)
! 2349: db_printf("<%08x>", instruct);
! 2350:
! 2351: db_printf("\n");
! 2352: return (loc + sizeof(instruct));
! 2353: }
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