Annotation of sys/arch/hppa64/dev/mem.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: mem.c,v 1.3 2005/11/28 20:13:08 martin Exp $ */
2:
3: /*
4: * Copyright (c) 2005 Michael Shalayeff
5: * All rights reserved.
6: *
7: * Permission to use, copy, modify, and distribute this software for any
8: * purpose with or without fee is hereby granted, provided that the above
9: * copyright notice and this permission notice appear in all copies.
10: *
11: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15: * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
16: * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
17: * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18: */
19: /*
20: * Copyright (c) 1991,1992,1994, The University of Utah and
21: * the Computer Systems Laboratory (CSL). All rights reserved.
22: *
23: * Subject to your agreements with CMU,
24: * permission to use, copy, modify and distribute this software and its
25: * documentation is hereby granted, provided that both the copyright
26: * notice and this permission notice appear in all copies of the
27: * software, derivative works or modified versions, and any portions
28: * thereof, and that both notices appear in supporting documentation.
29: *
30: * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
31: * IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
32: * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
33: *
34: * CSL requests users of this software to return to csl-dist@cs.utah.edu any
35: * improvements that they make and grant CSL redistribution rights.
36: *
37: * Utah $Hdr: mem.c 1.9 94/12/16$
38: */
39: /*
40: * Mach Operating System
41: * Copyright (c) 1992 Carnegie Mellon University
42: * All Rights Reserved.
43: *
44: * Permission to use, copy, modify and distribute this software and its
45: * documentation is hereby granted, provided that both the copyright
46: * notice and this permission notice appear in all copies of the
47: * software, derivative works or modified versions, and any portions
48: * thereof, and that both notices appear in supporting documentation.
49: *
50: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
51: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
52: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
53: *
54: * Carnegie Mellon requests users of this software to return to
55: *
56: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
57: * School of Computer Science
58: * Carnegie Mellon University
59: * Pittsburgh PA 15213-3890
60: *
61: * any improvements or extensions that they make and grant Carnegie Mellon
62: * the rights to redistribute these changes.
63: */
64:
65: #include <sys/param.h>
66: #include <sys/systm.h>
67: #include <sys/buf.h>
68: #include <sys/malloc.h>
69: #include <sys/proc.h>
70: #include <sys/uio.h>
71: #include <sys/types.h>
72: #include <sys/device.h>
73: #include <sys/errno.h>
74: #include <sys/ioctl.h>
75: #include <sys/file.h>
76:
77: #include <uvm/uvm.h>
78:
79: #include <machine/conf.h>
80: #include <machine/bus.h>
81: #include <machine/iomod.h>
82: #include <machine/autoconf.h>
83: #include <machine/pmap.h>
84:
85: #include <arch/hppa/dev/cpudevs.h>
86:
87: struct mem_softc {
88: struct device sc_dev;
89: };
90:
91: int memmatch(struct device *, void *, void *);
92: void memattach(struct device *, struct device *, void *);
93:
94: struct cfattach mem_ca = {
95: sizeof(struct mem_softc), memmatch, memattach
96: };
97:
98: struct cfdriver mem_cd = {
99: NULL, "mem", DV_DULL
100: };
101:
102: caddr_t zeropage;
103:
104: int
105: memmatch(parent, cfdata, aux)
106: struct device *parent;
107: void *cfdata;
108: void *aux;
109: {
110: struct confargs *ca = aux;
111:
112: if ((ca->ca_name && !strcmp(ca->ca_name, "memory")) ||
113: (ca->ca_type.iodc_type == HPPA_TYPE_MEMORY &&
114: ca->ca_type.iodc_sv_model == HPPA_MEMORY_PDEP))
115: return 1;
116:
117: return 0;
118: }
119:
120: void
121: memattach(parent, self, aux)
122: struct device *parent;
123: struct device *self;
124: void *aux;
125: {
126: struct pdc_iodc_minit pdc_minit PDC_ALIGNMENT;
127: /* struct mem_softc *sc = (struct mem_softc *)self; */
128: struct confargs *ca = aux;
129: int err;
130:
131: /* TODO scan the memory regions list */
132:
133: if ((err = pdc_call((iodcio_t)pdc, 0, PDC_IODC, PDC_IODC_NINIT,
134: &pdc_minit, ca->ca_hpa, PAGE0->imm_spa_size)) < 0)
135: pdc_minit.max_spa = PAGE0->imm_max_mem;
136:
137: printf(": size %d", pdc_minit.max_spa / (1024*1024));
138: if (pdc_minit.max_spa % (1024*1024))
139: printf(".%d", pdc_minit.max_spa % (1024*1024));
140: printf("MB\n");
141: }
142:
143: int
144: mmopen(dev, flag, ioflag, p)
145: dev_t dev;
146: int flag;
147: int ioflag;
148: struct proc *p;
149: {
150: return (0);
151: }
152:
153: /*ARGSUSED*/
154: int
155: mmclose(dev, flag, mode, p)
156: dev_t dev;
157: int flag, mode;
158: struct proc *p;
159: {
160: return (0);
161: }
162:
163: int
164: mmrw(dev, uio, flags)
165: dev_t dev;
166: struct uio *uio;
167: int flags;
168: {
169: struct iovec *iov;
170: vaddr_t v, o;
171: int error = 0;
172: u_int c;
173:
174: while (uio->uio_resid > 0 && error == 0) {
175: iov = uio->uio_iov;
176: if (iov->iov_len == 0) {
177: uio->uio_iov++;
178: uio->uio_iovcnt--;
179: if (uio->uio_iovcnt < 0)
180: panic("mmrw");
181: continue;
182: }
183: switch (minor(dev)) {
184:
185: case 0: /* /dev/mem */
186:
187: /* If the address isn't in RAM, bail. */
188: v = uio->uio_offset;
189: if (btoc(v) > physmem) {
190: error = EFAULT;
191: /* this will break us out of the loop */
192: continue;
193: }
194: c = ctob(physmem) - v;
195: c = min(c, uio->uio_resid);
196: error = uiomove((caddr_t)v, c, uio);
197: break;
198:
199: case 1: /* /dev/kmem */
200: v = uio->uio_offset;
201: o = v & PAGE_MASK;
202: c = min(uio->uio_resid, (int)(PAGE_SIZE - o));
203: if (btoc(v) > physmem && !uvm_kernacc((caddr_t)v,
204: c, (uio->uio_rw == UIO_READ) ? B_READ : B_WRITE)) {
205: error = EFAULT;
206: /* this will break us out of the loop */
207: continue;
208: }
209: error = uiomove((caddr_t)v, c, uio);
210: break;
211:
212: case 2: /* /dev/null */
213: if (uio->uio_rw == UIO_WRITE)
214: uio->uio_resid = 0;
215: return (0);
216:
217: case 12: /* /dev/zero */
218: /* Write to /dev/zero is ignored. */
219: if (uio->uio_rw == UIO_WRITE) {
220: uio->uio_resid = 0;
221: return (0);
222: }
223: /*
224: * On the first call, allocate and zero a page
225: * of memory for use with /dev/zero.
226: */
227: if (zeropage == NULL) {
228: zeropage = malloc(PAGE_SIZE, M_TEMP, M_WAITOK);
229: bzero(zeropage, PAGE_SIZE);
230: }
231: c = min(iov->iov_len, PAGE_SIZE);
232: error = uiomove(zeropage, c, uio);
233: break;
234:
235: default:
236: return (ENXIO);
237: }
238: }
239:
240: return (error);
241: }
242:
243: paddr_t
244: mmmmap(dev, off, prot)
245: dev_t dev;
246: off_t off;
247: int prot;
248: {
249: if (minor(dev) != 0)
250: return (-1);
251:
252: /*
253: * Allow access only in RAM.
254: */
255: #if 0
256: if (off < ctob(firstusablepage) ||
257: off >= ctob(lastusablepage + 1))
258: return (-1);
259: #endif
260: return (atop(off));
261: }
262:
263: int
264: mmioctl(dev, cmd, data, flags, p)
265: dev_t dev;
266: u_long cmd;
267: caddr_t data;
268: int flags;
269: struct proc *p;
270: {
271: return (EOPNOTSUPP);
272: }
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