Annotation of sys/arch/hppa64/dev/apic.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: apic.c,v 1.2 2005/05/22 01:42:49 mickey Exp $ */
2:
3: /*
4: * Copyright (c) 2005 Michael Shalayeff
5: * All rights reserved.
6: *
7: * Permission to use, copy, modify, and distribute this software for any
8: * purpose with or without fee is hereby granted, provided that the above
9: * copyright notice and this permission notice appear in all copies.
10: *
11: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15: * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
16: * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
17: * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18: */
19:
20: #define APIC_DEBUG
21:
22: #include <sys/param.h>
23: #include <sys/systm.h>
24: #include <sys/device.h>
25:
26: #include <dev/pci/pcireg.h>
27: #include <dev/pci/pcivar.h>
28: #include <dev/pci/pcidevs.h>
29:
30: #include <hppa64/dev/elroyreg.h>
31: #include <hppa64/dev/elroyvar.h>
32:
33:
34: void
35: apic_write(volatile struct elroy_regs *r, u_int32_t reg, u_int32_t val)
36: {
37: elroy_write32(&r->apic_addr, htole32(reg));
38: elroy_write32(&r->apic_data, htole32(val));
39: }
40:
41: u_int32_t
42: apic_read(volatile struct elroy_regs *r, u_int32_t reg)
43: {
44: elroy_write32(&r->apic_addr, htole32(reg));
45: return letoh32(elroy_read32(&r->apic_data));
46: }
47:
48: void
49: apic_attach(struct elroy_softc *sc)
50: {
51: volatile struct elroy_regs *r = sc->sc_regs;
52: u_int32_t data;
53:
54: data = apic_read(r, APIC_VERSION);
55: sc->sc_nints = (data & APIC_VERSION_NENT) >> APIC_VERSION_NENT_SHIFT;
56: printf(" APIC ver %x, %d pins",
57: data & APIC_VERSION_MASK, sc->sc_nints);
58: }
59:
60: int
61: apic_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
62: {
63: pci_chipset_tag_t pc = pa->pa_pc;
64: struct elroy_softc *sc = pc->_cookie;
65: pcitag_t tag = pa->pa_tag;
66: hppa_hpa_t hpa = cpu_gethpa(0);
67: pcireg_t reg;
68:
69: reg = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
70: printf(" pin=%d line=%d ", PCI_INTERRUPT_PIN(reg), PCI_INTERRUPT_LINE(reg));
71: apic_write(sc->sc_regs, APIC_ENT0(PCI_INTERRUPT_PIN(reg)),
72: PCI_INTERRUPT_LINE(reg));
73: apic_write(sc->sc_regs, APIC_ENT1(PCI_INTERRUPT_PIN(reg)),
74: ((hpa & 0x0ff00000) >> 4) | ((hpa & 0x000ff000) << 12));
75: *ihp = PCI_INTERRUPT_LINE(reg) + 1;
76: return (*ihp == 0);
77: }
78:
79: const char *
80: apic_intr_string(void *v, pci_intr_handle_t ih)
81: {
82: static char buf[32];
83:
84: snprintf(buf, 32, "irq %ld", ih);
85:
86: return (buf);
87: }
88:
89: void *
90: apic_intr_establish(void *v, pci_intr_handle_t ih,
91: int pri, int (*handler)(void *), void *arg, char *name)
92: {
93: /* struct elroy_softc *sc = v; */
94: /* volatile struct elroy_regs *r = sc->sc_regs; */
95: /* void *iv = NULL; */
96:
97: /* no mapping or bogus */
98: if (ih <= 0 || ih > 63)
99: return (NULL);
100:
101: #if 0
102: TODO
103: if ((iv = cpu_intr_map(sc->sc_ih, pri, ih - 1, handler, arg, name))) {
104: if (cold)
105: sc->sc_imr |= (1 << (ih - 1));
106: else
107: /* r->imr = sc->sc_imr |= (1 << (ih - 1)) */;
108: }
109: #endif
110:
111: return (arg);
112: }
113:
114: void
115: apic_intr_disestablish(void *v, void *cookie)
116: {
117: #if 0
118: struct elroy_softc *sc = v;
119: volatile struct elroy_regs *r = sc->sc_regs;
120:
121: r->imr &= ~(1 << (ih - 1));
122:
123: TODO cpu_intr_unmap(sc->sc_ih, cookie);
124: #endif
125: }
126:
127: int
128: apic_intr(void *v)
129: {
130:
131: return (0);
132: }
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