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Annotation of sys/arch/hppa/stand/boot/srt0.S, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: srt0.S,v 1.10 2005/04/07 00:21:51 mickey Exp $        */
                      2:
                      3: /*
                      4:  * Copyright (c) 1998-2004 Michael Shalayeff
                      5:  * All rights reserved.
                      6:  *
                      7:  * Redistribution and use in source and binary forms, with or without
                      8:  * modification, are permitted provided that the following conditions
                      9:  * are met:
                     10:  * 1. Redistributions of source code must retain the above copyright
                     11:  *    notice, this list of conditions and the following disclaimer.
                     12:  * 2. Redistributions in binary form must reproduce the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer in the
                     14:  *    documentation and/or other materials provided with the distribution.
                     15:  *
                     16:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
                     17:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
                     18:  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
                     19:  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
                     20:  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
                     21:  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
                     22:  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     23:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
                     24:  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
                     25:  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
                     26:  * THE POSSIBILITY OF SUCH DAMAGE.
                     27:  */
                     28: /*
                     29:  * Copyright 1996 1995 by Open Software Foundation, Inc.
                     30:  *              All Rights Reserved
                     31:  *
                     32:  * Permission to use, copy, modify, and distribute this software and
                     33:  * its documentation for any purpose and without fee is hereby granted,
                     34:  * provided that the above copyright notice appears in all copies and
                     35:  * that both the copyright notice and this permission notice appear in
                     36:  * supporting documentation.
                     37:  *
                     38:  * OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
                     39:  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
                     40:  * FOR A PARTICULAR PURPOSE.
                     41:  *
                     42:  * IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
                     43:  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
                     44:  * LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
                     45:  * NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
                     46:  * WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
                     47:  *
                     48:  */
                     49: ;
                     50: ; Copyright (c) 1990 mt Xinu, Inc.  All rights reserved.
                     51: ; Copyright (c) 1990 University of Utah.  All rights reserved.
                     52: ;
                     53: ; This file may be freely distributed in any form as long as
                     54: ; this copyright notice is included.
                     55: ; THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
                     56: ; IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
                     57: ; WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
                     58: ;
                     59: ;      Utah $Hdr: srt0.c 1.3 94/12/13$
                     60: ;
                     61:
                     62: #define        _LOCORE
                     63: #include <machine/asm.h>
                     64: #include <machine/cpu.h>
                     65: #include <machine/iomod.h>
                     66:
                     67: /*
                     68:  * This is the ending of the begin
                     69:  */
                     70: ENTRY(begin,0)
                     71:
                     72:        blr     %r0,%r5                 ; Get address of 'boff' into 'r5',
                     73:        ldo     begin-boff(%r5),%r5     ;   and subtract to get 'begin'.
                     74: boff
                     75:        ldil    L%RELOC,%r4
                     76:        ldo     R%RELOC(%r4),%r4
                     77:        ldo     start-begin(%r4),%rp
                     78:        ldil    L%edata,%r3
                     79:        ldo     R%edata(%r3),%r3        ; Get address of edata.
                     80:        ldil    L%begin,%r1
                     81:        ldo     R%begin(%r1),%r1        ; Get address of begin
                     82:        sub     %r3,%r1,%r3             ; Subtract to get # of bytes to copy
                     83: copyloop                               ; do
                     84:        ldwm    4(%r5),%r1              ;   *r4++ = *r5++;
                     85:        addib,>= -4,%r3,copyloop        ; while (--r3 >= 0);
                     86:        stwm    %r1,4(%r4)
                     87:
                     88:        ; here we zero the .bss
                     89:        ldil    L%__bss_start, %r4
                     90:        ldo     R%__bss_start(%r4), %r4
                     91:        ldil    L%__bss_end, %r3
                     92:        ldo     R%__bss_end(%r3), %r3
                     93: zeroloop
                     94:        combf,<,n %r3,%r4, zeroloop     ; while (r4 < r3);
                     95:        stwm    %r0,4(%r4)              ;       *r4++ = 0;
                     96:
                     97:        ldil    L%$global$,%dp
                     98:        ldo     R%$global$(%dp),%dp
                     99:        ldil    L%start,%r1
                    100:        ldo     R%start(%r1),%r1
                    101:        sub     %dp,%r1,%dp             ; Subtract to get difference
                    102:        add     %rp,%dp,%dp             ;   and relocate it.
                    103:
                    104: ;
                    105: ; We have relocated ourself to RELOC.  If we are running on a machine
                    106: ; with separate instruction and data caches, we must flush our data
                    107: ; cache before trying to execute the code starting at rp.
                    108: ;
                    109:        ldil    L%RELOC,%r22            ; Set %t1 to start of relocated code.
                    110:        ldo     R%RELOC(%r22),%r22
                    111:        ldil    L%edata,%r21            ; Set r21 to address of edata
                    112:        ldo     R%edata(%r21),%r21
                    113:        ldil    L%begin,%r1             ; set %r1 to address of begin
                    114:        ldo     R%begin(%r1),%r1
                    115:        sub     %r21,%r1,%r21           ; Subtract to get length
                    116:        mtsp    %r0,%sr0                ; Set sr0 to kernel space.
                    117:        ldo     -1(%r21),%r21
                    118:        fdc     %r21(0,%r22)
                    119: loop   addib,>,n -16,%r21,loop         ; Decrement by cache line size (16).
                    120:        fdc     %r21(%sr0,%r22)
                    121:        fdc     0(%sr0,%r22)            ; Flush first word at addr to handle
                    122:        sync                            ;   arbitrary cache line boundary.
                    123:        nop                             ; Prevent prefetching.
                    124:        nop
                    125:        nop
                    126:        nop
                    127:        nop
                    128:        nop
                    129:        nop
                    130:        bv      0(rp)
                    131:        nop
                    132: EXIT(begin)                            /* jump to relocated code */
                    133:
                    134: start
                    135:        ldil    L%HEAP_LIMIT, %sp
                    136:        ldo     R%HEAP_LIMIT(%sp), %sp
                    137:
                    138:        .import bootprompt, data
                    139:        ldil    L%bootprompt, t1
                    140:        stw     r26, R%bootprompt(t1)
                    141:        b       boot                    ; Call boot(),
                    142:        copy    %r0, arg0               ; use default boot device
                    143:        nop
                    144:
                    145: /*
                    146:  * rtt - restart the box
                    147:  */
                    148: LEAF_ENTRY(_rtt)
                    149:        ldil    L%HPPA_LBCAST, %r25
                    150:        ldi     CMD_RESET, %r26
                    151:        stw     %r26,R%iomod_command(%r25)
                    152: forever                                 ; Loop until bus reset takes effect.
                    153:        b,n     forever
                    154:
                    155:        bv      0(rp)
                    156:        ldo     -48(sp),sp
                    157: EXIT(_rtt)
                    158:
                    159:        .end

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