Annotation of sys/arch/hppa/include/trap.h, Revision 1.1
1.1 ! nbrk 1: /* $OpenBSD: trap.h,v 1.12 2005/05/26 04:34:52 kettenis Exp $ */
! 2:
! 3: /*
! 4: * Copyright (c) 1999-2004 Michael Shalayeff
! 5: * All rights reserved.
! 6: *
! 7: * Redistribution and use in source and binary forms, with or without
! 8: * modification, are permitted provided that the following conditions
! 9: * are met:
! 10: * 1. Redistributions of source code must retain the above copyright
! 11: * notice, this list of conditions and the following disclaimer.
! 12: * 2. Redistributions in binary form must reproduce the above copyright
! 13: * notice, this list of conditions and the following disclaimer in the
! 14: * documentation and/or other materials provided with the distribution.
! 15: *
! 16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
! 17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
! 18: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
! 19: * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
! 20: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
! 21: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
! 22: * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! 23: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
! 24: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
! 25: * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
! 26: * THE POSSIBILITY OF SUCH DAMAGE.
! 27: */
! 28:
! 29: #ifndef _MACHINE_TRAP_H_
! 30: #define _MACHINE_TRAP_H_
! 31:
! 32: /*
! 33: * This is PA-RISC trap types per 1.1 specs, see .c files for references.
! 34: */
! 35: #define T_NONEXIST 0 /* invalid interrupt vector */
! 36: #define T_HPMC 1 /* high priority machine check */
! 37: #define T_POWERFAIL 2 /* power failure */
! 38: #define T_RECOVERY 3 /* recovery counter */
! 39: #define T_INTERRUPT 4 /* external interrupt */
! 40: #define T_LPMC 5 /* low-priority machine check */
! 41: #define T_ITLBMISS 6 /* instruction TLB miss fault */
! 42: #define T_IPROT 7 /* instruction protection */
! 43: #define T_ILLEGAL 8 /* Illegal instruction */
! 44: #define T_IBREAK 9 /* break instruction */
! 45: #define T_PRIV_OP 10 /* privileged operation */
! 46: #define T_PRIV_REG 11 /* privileged register */
! 47: #define T_OVERFLOW 12 /* overflow */
! 48: #define T_CONDITION 13 /* conditional */
! 49: #define T_EXCEPTION 14 /* assist exception */
! 50: #define T_DTLBMISS 15 /* data TLB miss */
! 51: #define T_ITLBMISSNA 16 /* ITLB non-access miss */
! 52: #define T_DTLBMISSNA 17 /* DTLB non-access miss */
! 53: #define T_DPROT 18 /* data protection/rights/alignment <7100 */
! 54: #define T_DBREAK 19 /* data break */
! 55: #define T_TLB_DIRTY 20 /* TLB dirty bit */
! 56: #define T_PAGEREF 21 /* page reference */
! 57: #define T_EMULATION 22 /* assist emulation */
! 58: #define T_HIGHERPL 23 /* higher-privelege transfer */
! 59: #define T_LOWERPL 24 /* lower-privilege transfer */
! 60: #define T_TAKENBR 25 /* taken branch */
! 61: #define T_DATACC 26 /* data access rights >=7100 */
! 62: #define T_DATAPID 27 /* data protection ID >=7100 */
! 63: #define T_DATALIGN 28 /* unaligned data ref */
! 64: #define T_PERFMON 29 /* performance monitor interrupt */
! 65: #define T_IDEBUG 30 /* debug SFU interrupt */
! 66: #define T_DDEBUG 31 /* debug SFU interrupt */
! 67:
! 68: /*
! 69: * Reserved range for traps is 0-63, place user flag at 6th bit
! 70: */
! 71: #define T_USER_POS 25
! 72: #define T_USER (1 << (31 - T_USER_POS))
! 73:
! 74: /*
! 75: * Various trap frame flags.
! 76: */
! 77: #define TFF_LAST_POS 0
! 78: #define TFF_ITLB_POS 1
! 79: #define TFF_SYS_POS 2
! 80: #define TFF_INTR_POS 3
! 81:
! 82: #define TFF_LAST (1 << (31 - TFF_LAST_POS))
! 83: #define TFF_ITLB (1 << (31 - TFF_ITLB_POS))
! 84: #define TFF_SYS (1 << (31 - TFF_SYS_POS))
! 85: #define TFF_INTR (1 << (31 - TFF_INTR_POS))
! 86:
! 87: /*
! 88: * Define this for pretty printings of trapflags.
! 89: */
! 90: #define T_BITS "\020\07user\036intr\037itlb\040last"
! 91:
! 92: /*
! 93: * These are break instruction entry points.
! 94: */
! 95: /* im5 */
! 96: #define HPPA_BREAK_KERNEL 0
! 97: /* im13 */
! 98: #define HPPA_BREAK_SS 4
! 99: #define HPPA_BREAK_KGDB 5
! 100: #define HPPA_BREAK_GET_PSW 9
! 101: #define HPPA_BREAK_SET_PSW 10
! 102: #define HPPA_BREAK_SPLLOWER 11
! 103:
! 104: /*
! 105: * break instruction decoding.
! 106: */
! 107: #define break5(i) ((i) & 0x1f)
! 108: #define break13(i) (((i) >> 13) & 0x1fff)
! 109:
! 110: #endif /* _MACHINE_TRAP_H_ */
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