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Revision 1.1.1.1 (vendor branch), Tue Mar 4 16:05:53 2008 UTC (16 years, 3 months ago) by nbrk
Branch: OPENBSD_4_2_BASE, MAIN
CVS Tags: jornada-partial-support-wip, HEAD
Changes since 1.1: +0 -0 lines

Import of OpenBSD 4.2 release kernel tree with initial code to support 
Jornada 720/728, StrongARM 1110-based handheld PC.
At this point kernel roots on NFS and boots into vfs_mountroot() and traps.
What is supported:
- glass console, Jornada framebuffer (jfb) works in 16bpp direct color mode
(needs some palette tweaks for non black/white/blue colors, i think)
- saic, SA11x0 interrupt controller (needs cleanup)
- sacom, SA11x0 UART (supported only as boot console for now)
- SA11x0 GPIO controller fully supported (but can't handle multiple interrupt
handlers on one gpio pin)
- sassp, SSP port on SA11x0 that attaches spibus
- Jornada microcontroller (jmcu) to control kbd, battery, etc throught
the SPI bus (wskbd attaches on jmcu, but not tested)
- tod functions seem work
- initial code for SA-1111 (chip companion) : this is TODO

Next important steps, i think:
- gpio and intc on sa1111
- pcmcia support for sa11x0 (and sa1111 help logic)
- REAL root on nfs when we have PCMCIA support (we may use any of supported pccard NICs)
- root on wd0! (using already supported PCMCIA-ATA)

/*	$OpenBSD: pte.h,v 1.11 2002/09/05 18:41:19 mickey Exp $	*/

/* 
 * Copyright (c) 1990,1993,1994 The University of Utah and
 * the Computer Systems Laboratory at the University of Utah (CSL).
 * All rights reserved.
 *
 * Permission to use, copy, modify and distribute this software is hereby
 * granted provided that (1) source code retains these copyright, permission,
 * and disclaimer notices, and (2) redistributions including binaries
 * reproduce the notices in supporting documentation, and (3) all advertising
 * materials mentioning features or use of this software display the following
 * acknowledgement: ``This product includes software developed by the
 * Computer Systems Laboratory at the University of Utah.''
 *
 * THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
 * IS" CONDITION.  THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
 * ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
 *
 * CSL requests users of this software to return to csl-dist@cs.utah.edu any
 * improvements that they make and grant CSL redistribution rights.
 *
 * 	Utah $Hdr: pmap.h 1.24 94/12/14$
 *	Author: Mike Hibler, Bob Wheeler, University of Utah CSL, 9/90
 */

#ifndef	_MACHINE_PTE_H_
#define	_MACHINE_PTE_H_

typedef	u_int32_t	pt_entry_t;

#define	PTE_PROT_SHIFT	19
#define	PTE_PROT(tlb)	((tlb) >> PTE_PROT_SHIFT)
#define	TLB_PROT(pte)	((pte) << PTE_PROT_SHIFT)
#define	PDE_MASK	(0xffc00000)
#define	PDE_SIZE	(0x00400000)
#define	PTE_MASK	(0x003ff000)
#define	PTE_PAGE(pte)	((pte) & ~PGOFSET)

/* TLB access/protection values */
#define TLB_WIRED	0x40000000	/* software only */
#define TLB_REFTRAP	0x20000000
#define TLB_DIRTY	0x10000000
#define TLB_BREAK	0x08000000
#define TLB_AR_MASK	0x07f00000
#define	TLB_READ	0x00000000
#define	TLB_WRITE	0x01000000
#define	TLB_EXECUTE	0x02000000
#define	TLB_GATEWAY	0x04000000
#define	TLB_USER	0x00f00000
#define		TLB_AR_NA	0x07300000
#define		TLB_AR_R	TLB_READ
#define		TLB_AR_RW	TLB_READ|TLB_WRITE
#define		TLB_AR_RX	TLB_READ|TLB_EXECUTE
#define		TLB_AR_RWX	TLB_READ|TLB_WRITE|TLB_EXECUTE
#define TLB_UNCACHABLE	0x00080000
#define TLB_PID_MASK	0x0000fffe

#define	TLB_BITS	"\020\024U\031W\032X\033N\034B\035D\036R\037H"

/* protection for a gateway page */
#define TLB_GATE_PROT	0x04c00000

/* protection for break page */
#define TLB_BREAK_PROT	0x02c00000

#endif	/* _MACHINE_PTE_H_ */