Annotation of sys/arch/hppa/include/cpufunc.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: cpufunc.h,v 1.27 2005/04/07 00:19:28 mickey Exp $ */
2:
3: /*
4: * Copyright (c) 1998-2004 Michael Shalayeff
5: * All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: *
16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19: * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
20: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22: * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25: * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26: * THE POSSIBILITY OF SUCH DAMAGE.
27: */
28: /*
29: * (c) Copyright 1988 HEWLETT-PACKARD COMPANY
30: *
31: * To anyone who acknowledges that this file is provided "AS IS"
32: * without any express or implied warranty:
33: * permission to use, copy, modify, and distribute this file
34: * for any purpose is hereby granted without fee, provided that
35: * the above copyright notice and this notice appears in all
36: * copies, and that the name of Hewlett-Packard Company not be
37: * used in advertising or publicity pertaining to distribution
38: * of the software without specific, written prior permission.
39: * Hewlett-Packard Company makes no representations about the
40: * suitability of this software for any purpose.
41: */
42: /*
43: * Copyright (c) 1990,1994 The University of Utah and
44: * the Computer Systems Laboratory (CSL). All rights reserved.
45: *
46: * THE UNIVERSITY OF UTAH AND CSL PROVIDE THIS SOFTWARE IN ITS "AS IS"
47: * CONDITION, AND DISCLAIM ANY LIABILITY OF ANY KIND FOR ANY DAMAGES
48: * WHATSOEVER RESULTING FROM ITS USE.
49: *
50: * CSL requests users of this software to return to csl-dist@cs.utah.edu any
51: * improvements that they make and grant CSL redistribution rights.
52: *
53: * Utah $Hdr: c_support.s 1.8 94/12/14$
54: * Author: Bob Wheeler, University of Utah CSL
55: */
56:
57: #ifndef _MACHINE_CPUFUNC_H_
58: #define _MACHINE_CPUFUNC_H_
59:
60: #include <machine/psl.h>
61: #include <machine/pte.h>
62:
63: #define tlbbtop(b) ((b) >> (PGSHIFT - 5))
64: #define tlbptob(p) ((p) << (PGSHIFT - 5))
65:
66: #define hptbtop(b) ((b) >> 17)
67:
68: /* Get space register for an address */
69: static __inline register_t ldsid(vaddr_t p) {
70: register_t ret;
71: __asm __volatile("ldsid (%1),%0" : "=r" (ret) : "r" (p));
72: return ret;
73: }
74:
75: #define mtctl(v,r) __asm __volatile("mtctl %0,%1":: "r" (v), "i" (r))
76: #define mfctl(r,v) __asm __volatile("mfctl %1,%0": "=r" (v): "i" (r))
77:
78: #define mfcpu(r,v) /* XXX for the lack of the mnemonics */ \
79: __asm __volatile(".word %1\n\t" \
80: "copy %%r22, %0" \
81: : "=r" (v) : "i" ((0x14001400 | ((r) << 21) | (22))) \
82: : "r22")
83:
84: #define mtsp(v,r) __asm __volatile("mtsp %0,%1":: "r" (v), "i" (r))
85: #define mfsp(r,v) __asm __volatile("mfsp %1,%0": "=r" (v): "i" (r))
86:
87: #define ssm(v,r) __asm __volatile("ssm %1,%0": "=r" (r): "i" (v))
88: #define rsm(v,r) __asm __volatile("rsm %1,%0": "=r" (r): "i" (v))
89:
90: /* Move to system mask. Old value of system mask is returned. */
91: static __inline register_t
92: mtsm(register_t mask) {
93: register_t ret;
94: __asm __volatile("ssm 0,%0\n\t"
95: "mtsm %1": "=&r" (ret) : "r" (mask));
96: return ret;
97: }
98:
99: #define fdce(sp,off) __asm __volatile("fdce 0(%0,%1)":: "i" (sp), "r" (off))
100: #define fice(sp,off) __asm __volatile("fice 0(%0,%1)":: "i" (sp), "r" (off))
101: #define sync_caches() __asm __volatile(\
102: "sync\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop":::"memory")
103:
104: static __inline void
105: iitlba(u_int pg, pa_space_t sp, vaddr_t va)
106: {
107: mtsp(sp, 1);
108: __asm volatile("iitlba %0,(%%sr1, %1)":: "r" (pg), "r" (va));
109: }
110:
111: static __inline void
112: idtlba(u_int pg, pa_space_t sp, vaddr_t va)
113: {
114: mtsp(sp, 1);
115: __asm volatile("idtlba %0,(%%sr1, %1)":: "r" (pg), "r" (va));
116: }
117:
118: static __inline void
119: iitlbp(u_int prot, pa_space_t sp, vaddr_t va)
120: {
121: mtsp(sp, 1);
122: __asm volatile("iitlbp %0,(%%sr1, %1)":: "r" (prot), "r" (va));
123: }
124:
125: static __inline void
126: idtlbp(u_int prot, pa_space_t sp, vaddr_t va)
127: {
128: mtsp(sp, 1);
129: __asm volatile("idtlbp %0,(%%sr1, %1)":: "r" (prot), "r" (va));
130: }
131:
132: static __inline void
133: pitlb(pa_space_t sp, vaddr_t va)
134: {
135: mtsp(sp, 1);
136: __asm volatile("pitlb %%r0(%%sr1, %0)":: "r" (va));
137: }
138:
139: static __inline void
140: pdtlb(pa_space_t sp, vaddr_t va)
141: {
142: mtsp(sp, 1);
143: __asm volatile("pdtlb %%r0(%%sr1, %0)":: "r" (va));
144: }
145:
146: static __inline void
147: pitlbe(pa_space_t sp, vaddr_t va)
148: {
149: mtsp(sp, 1);
150: __asm volatile("pitlbe %%r0(%%sr1, %0)":: "r" (va));
151: }
152:
153: static __inline void
154: pdtlbe(pa_space_t sp, vaddr_t va)
155: {
156: mtsp(sp, 1);
157: __asm volatile("pdtlbe %%r0(%%sr1, %0)":: "r" (va));
158: }
159:
160: #ifdef USELEDS
161: #define PALED_NETSND 0x01
162: #define PALED_NETRCV 0x02
163: #define PALED_DISK 0x04
164: #define PALED_HEARTBEAT 0x08
165: #define PALED_LOADMASK 0xf0
166:
167: #define PALED_DATA 0x01
168: #define PALED_STROBE 0x02
169:
170: extern volatile u_int8_t *machine_ledaddr;
171: extern int machine_ledword, machine_leds;
172:
173: static __inline void
174: ledctl(int on, int off, int toggle)
175: {
176: if (machine_ledaddr) {
177: int r;
178:
179: if (on)
180: machine_leds |= on;
181: if (off)
182: machine_leds &= ~off;
183: if (toggle)
184: machine_leds ^= toggle;
185:
186: r = ~machine_leds; /* it seems they should be reversed */
187:
188: if (machine_ledword)
189: *machine_ledaddr = r;
190: else {
191: register int b;
192: for (b = 0x80; b; b >>= 1) {
193: *machine_ledaddr = (r & b)? PALED_DATA : 0;
194: DELAY(1);
195: *machine_ledaddr = ((r & b)? PALED_DATA : 0) |
196: PALED_STROBE;
197: }
198: }
199: }
200: }
201: #endif
202:
203: #ifdef _KERNEL
204: extern int (*cpu_hpt_init)(vaddr_t hpt, vsize_t hptsize);
205:
206: void fpu_save(vaddr_t va);
207: void fpu_exit(void);
208: void ficache(pa_space_t sp, vaddr_t va, vsize_t size);
209: void fdcache(pa_space_t sp, vaddr_t va, vsize_t size);
210: void pdcache(pa_space_t sp, vaddr_t va, vsize_t size);
211: void ficacheall(void);
212: void fdcacheall(void);
213: void ptlball(void);
214: int btlb_insert(pa_space_t space, vaddr_t va, paddr_t pa, vsize_t *lenp, u_int prot);
215: hppa_hpa_t cpu_gethpa(int n);
216: void eaio_l2(int i);
217: #endif
218:
219: #endif /* _MACHINE_CPUFUNC_H_ */
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