Annotation of sys/arch/hppa/hppa/process_machdep.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: process_machdep.c,v 1.14 2007/07/20 20:52:51 kettenis Exp $ */
2:
3: /*
4: * Copyright (c) 1999-2004 Michael Shalayeff
5: * All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: *
16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19: * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
20: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22: * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25: * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26: * THE POSSIBILITY OF SUCH DAMAGE.
27: */
28:
29:
30: #include <sys/param.h>
31: #include <sys/systm.h>
32: #include <sys/proc.h>
33: #include <sys/ptrace.h>
34: #include <sys/user.h>
35:
36: #include <machine/cpufunc.h>
37: #include <machine/frame.h>
38:
39: int
40: process_read_regs(p, regs)
41: struct proc *p;
42: struct reg *regs;
43: {
44: struct trapframe *tf = p->p_md.md_regs;
45:
46: regs->r_regs[ 0] = tf->tf_sar;
47: regs->r_regs[ 1] = tf->tf_r1;
48: regs->r_regs[ 2] = tf->tf_rp;
49: regs->r_regs[ 3] = tf->tf_r3;
50: regs->r_regs[ 4] = tf->tf_r4;
51: regs->r_regs[ 5] = tf->tf_r5;
52: regs->r_regs[ 6] = tf->tf_r6;
53: regs->r_regs[ 7] = tf->tf_r7;
54: regs->r_regs[ 8] = tf->tf_r8;
55: regs->r_regs[ 9] = tf->tf_r9;
56: regs->r_regs[10] = tf->tf_r10;
57: regs->r_regs[11] = tf->tf_r11;
58: regs->r_regs[12] = tf->tf_r12;
59: regs->r_regs[13] = tf->tf_r13;
60: regs->r_regs[14] = tf->tf_r14;
61: regs->r_regs[15] = tf->tf_r15;
62: regs->r_regs[16] = tf->tf_r16;
63: regs->r_regs[17] = tf->tf_r17;
64: regs->r_regs[18] = tf->tf_r18;
65: regs->r_regs[19] = tf->tf_t4;
66: regs->r_regs[20] = tf->tf_t3;
67: regs->r_regs[21] = tf->tf_t2;
68: regs->r_regs[22] = tf->tf_t1;
69: regs->r_regs[23] = tf->tf_arg3;
70: regs->r_regs[24] = tf->tf_arg2;
71: regs->r_regs[25] = tf->tf_arg1;
72: regs->r_regs[26] = tf->tf_arg0;
73: regs->r_regs[27] = tf->tf_dp;
74: regs->r_regs[28] = tf->tf_ret0;
75: regs->r_regs[29] = tf->tf_ret1;
76: regs->r_regs[30] = tf->tf_sp;
77: regs->r_regs[31] = tf->tf_r31;
78: regs->r_pc = tf->tf_iioq_head;
79: regs->r_npc = tf->tf_iioq_tail;
80:
81: return (0);
82: }
83:
84: int
85: process_read_fpregs(p, fpregs)
86: struct proc *p;
87: struct fpreg *fpregs;
88: {
89: extern paddr_t fpu_curpcb;
90: extern u_int fpu_enable;
91:
92: if (p->p_md.md_regs->tf_cr30 == fpu_curpcb) {
93: mtctl(fpu_enable, CR_CCR);
94: fpu_save((vaddr_t)p->p_addr->u_pcb.pcb_fpregs);
95: mtctl(0, CR_CCR);
96: }
97: bcopy(p->p_addr->u_pcb.pcb_fpregs, fpregs, 32 * 8);
98: pdcache(HPPA_SID_KERNEL, (vaddr_t)p->p_addr->u_pcb.pcb_fpregs, 32 * 8);
99:
100: return (0);
101: }
102:
103: #ifdef PTRACE
104:
105: int
106: process_write_regs(p, regs)
107: struct proc *p;
108: struct reg *regs;
109: {
110: struct trapframe *tf = p->p_md.md_regs;
111:
112: tf->tf_sar = regs->r_regs[ 0];
113: tf->tf_r1 = regs->r_regs[ 1];
114: tf->tf_rp = regs->r_regs[ 2];
115: tf->tf_r3 = regs->r_regs[ 3];
116: tf->tf_r4 = regs->r_regs[ 4];
117: tf->tf_r5 = regs->r_regs[ 5];
118: tf->tf_r6 = regs->r_regs[ 6];
119: tf->tf_r7 = regs->r_regs[ 7];
120: tf->tf_r8 = regs->r_regs[ 8];
121: tf->tf_r9 = regs->r_regs[ 9];
122: tf->tf_r10 = regs->r_regs[10];
123: tf->tf_r11 = regs->r_regs[11];
124: tf->tf_r12 = regs->r_regs[12];
125: tf->tf_r13 = regs->r_regs[13];
126: tf->tf_r14 = regs->r_regs[14];
127: tf->tf_r15 = regs->r_regs[15];
128: tf->tf_r16 = regs->r_regs[16];
129: tf->tf_r17 = regs->r_regs[17];
130: tf->tf_r18 = regs->r_regs[18];
131: tf->tf_t4 = regs->r_regs[19];
132: tf->tf_t3 = regs->r_regs[20];
133: tf->tf_t2 = regs->r_regs[21];
134: tf->tf_t1 = regs->r_regs[22];
135: tf->tf_arg3 = regs->r_regs[23];
136: tf->tf_arg2 = regs->r_regs[24];
137: tf->tf_arg1 = regs->r_regs[25];
138: tf->tf_arg0 = regs->r_regs[26];
139: tf->tf_dp = regs->r_regs[27];
140: tf->tf_ret0 = regs->r_regs[28];
141: tf->tf_ret1 = regs->r_regs[29];
142: tf->tf_sp = regs->r_regs[30];
143: tf->tf_r31 = regs->r_regs[31];
144: tf->tf_iioq_head = regs->r_pc | HPPA_PC_PRIV_USER;
145: tf->tf_iioq_tail = regs->r_npc | HPPA_PC_PRIV_USER;
146:
147: return (0);
148: }
149:
150: int
151: process_write_fpregs(p, fpregs)
152: struct proc *p;
153: struct fpreg *fpregs;
154: {
155: extern paddr_t fpu_curpcb;
156:
157: if (p->p_md.md_regs->tf_cr30 == fpu_curpcb) {
158: fpu_exit();
159: fpu_curpcb = 0;
160: }
161:
162: bcopy(fpregs, p->p_addr->u_pcb.pcb_fpregs, 32 * 8);
163: fdcache(HPPA_SID_KERNEL, (vaddr_t)p->p_addr->u_pcb.pcb_fpregs, 32 * 8);
164:
165: return (0);
166: }
167:
168: /* process_sstep() is in trap.c */
169:
170: int
171: process_set_pc(p, addr)
172: struct proc *p;
173: caddr_t addr;
174: {
175: p->p_md.md_regs->tf_iioq_head = (register_t)addr | HPPA_PC_PRIV_USER;
176: p->p_md.md_regs->tf_iioq_tail = p->p_md.md_regs->tf_iioq_head + 4;
177:
178: return (0);
179: }
180:
181: #endif /* PTRACE */
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