Annotation of sys/arch/hppa/gsc/gscbus.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: gscbus.c,v 1.27 2005/06/09 18:01:36 mickey Exp $ */
2:
3: /*
4: * Copyright (c) 1998 Michael Shalayeff
5: * All rights reserved.
6: *
7: * Redistribution and use in source and binary forms, with or without
8: * modification, are permitted provided that the following conditions
9: * are met:
10: * 1. Redistributions of source code must retain the above copyright
11: * notice, this list of conditions and the following disclaimer.
12: * 2. Redistributions in binary form must reproduce the above copyright
13: * notice, this list of conditions and the following disclaimer in the
14: * documentation and/or other materials provided with the distribution.
15: *
16: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19: * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
20: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22: * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
25: * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26: * THE POSSIBILITY OF SUCH DAMAGE.
27: */
28:
29: /* #define GSCDEBUG */
30:
31: #include <sys/param.h>
32: #include <sys/systm.h>
33: #include <sys/device.h>
34: #include <sys/malloc.h>
35: #include <sys/user.h>
36: #include <sys/mbuf.h>
37: #include <sys/reboot.h>
38:
39: #include <machine/iomod.h>
40: #include <machine/autoconf.h>
41: #include <machine/cpufunc.h>
42:
43: #include <hppa/gsc/gscbusvar.h>
44:
45: int gscmatch(struct device *, void *, void *);
46: void gscattach(struct device *, struct device *, void *);
47:
48: struct cfattach gsc_ca = {
49: sizeof(struct gsc_softc), gscmatch, gscattach
50: };
51:
52: struct cfdriver gsc_cd = {
53: NULL, "gsc", DV_DULL
54: };
55:
56: int gsc_dmamap_create(void *, bus_size_t, int,
57: bus_size_t, bus_size_t, int, bus_dmamap_t *);
58: void gsc_dmamap_destroy(void *, bus_dmamap_t);
59: int gsc_dmamap_load(void *, bus_dmamap_t, void *,
60: bus_size_t, struct proc *, int);
61: int gsc_dmamap_load_mbuf(void *, bus_dmamap_t, struct mbuf *, int);
62: int gsc_dmamap_load_uio(void *, bus_dmamap_t, struct uio *, int);
63: int gsc_dmamap_load_raw(void *, bus_dmamap_t,
64: bus_dma_segment_t *, int, bus_size_t, int);
65: void gsc_dmamap_unload(void *, bus_dmamap_t);
66: void gsc_dmamap_sync(void *, bus_dmamap_t, bus_addr_t, bus_size_t,
67: int);
68:
69: int gsc_dmamem_alloc(void *, bus_size_t, bus_size_t,
70: bus_size_t, bus_dma_segment_t *, int, int *, int);
71: void gsc_dmamem_free(void *, bus_dma_segment_t *, int);
72: int gsc_dmamem_map(void *, bus_dma_segment_t *,
73: int, size_t, caddr_t *, int);
74: void gsc_dmamem_unmap(void *, caddr_t, size_t);
75: paddr_t gsc_dmamem_mmap(void *, bus_dma_segment_t *, int, off_t, int, int);
76:
77: int
78: gscmatch(parent, cfdata, aux)
79: struct device *parent;
80: void *cfdata;
81: void *aux;
82: {
83: struct confargs *ca = aux;
84:
85: return !strcmp(ca->ca_name, "gsc");
86: }
87:
88: void
89: gscattach(parent, self, aux)
90: struct device *parent;
91: struct device *self;
92: void *aux;
93: {
94: struct gsc_softc *sc = (struct gsc_softc *)self;
95: struct gsc_attach_args *ga = aux;
96:
97: sc->sc_iot = ga->ga_iot;
98: sc->sc_ic = ga->ga_ic;
99:
100: #ifdef USELEDS
101: if (machine_ledaddr)
102: printf(": %sleds", machine_ledword? "word" : "");
103: #endif
104: printf ("\n");
105:
106: sc->sc_ih = cpu_intr_establish(IPL_NESTED, ga->ga_irq,
107: gsc_intr, (void *)sc->sc_ic->gsc_base, sc->sc_dev.dv_xname);
108:
109: /* DMA guts */
110: sc->sc_dmatag._cookie = sc;
111: sc->sc_dmatag._dmamap_create = gsc_dmamap_create;
112: sc->sc_dmatag._dmamap_destroy = gsc_dmamap_destroy;
113: sc->sc_dmatag._dmamap_load = gsc_dmamap_load;
114: sc->sc_dmatag._dmamap_load_mbuf = gsc_dmamap_load_mbuf;
115: sc->sc_dmatag._dmamap_load_uio = gsc_dmamap_load_uio;
116: sc->sc_dmatag._dmamap_load_raw = gsc_dmamap_load_raw;
117: sc->sc_dmatag._dmamap_unload = gsc_dmamap_unload;
118: sc->sc_dmatag._dmamap_sync = gsc_dmamap_sync;
119:
120: sc->sc_dmatag._dmamem_alloc = gsc_dmamem_alloc;
121: sc->sc_dmatag._dmamem_free = gsc_dmamem_free;
122: sc->sc_dmatag._dmamem_map = gsc_dmamem_map;
123: sc->sc_dmatag._dmamem_unmap = gsc_dmamem_unmap;
124: sc->sc_dmatag._dmamem_mmap = gsc_dmamem_mmap;
125:
126: pdc_scanbus(self, &ga->ga_ca, MAXMODBUS, 0);
127: }
128:
129: int
130: gscprint(aux, pnp)
131: void *aux;
132: const char *pnp;
133: {
134: struct gsc_attach_args *ga = aux;
135:
136: if (pnp)
137: printf("%s at %s", ga->ga_name, pnp);
138: return (UNCONF);
139: }
140:
141: void *
142: gsc_intr_establish(sc, irq, pri, handler, arg, name)
143: struct gsc_softc *sc;
144: int pri;
145: int irq;
146: int (*handler)(void *v);
147: void *arg;
148: const char *name;
149: {
150: volatile u_int32_t *r = sc->sc_ic->gsc_base;
151: void *iv;
152:
153: if ((iv = cpu_intr_map(sc->sc_ih, pri, irq, handler, arg, name)))
154: r[1] |= (1 << irq);
155: else {
156: #ifdef GSCDEBUG
157: printf("%s: attaching irq %d, already occupied\n",
158: sc->sc_dev.dv_xname, irq);
159: #endif
160: }
161:
162: return (iv);
163: }
164:
165: void
166: gsc_intr_disestablish(sc, v)
167: struct gsc_softc *sc;
168: void *v;
169: {
170: #if notyet
171: volatile u_int32_t *r = sc->sc_ic->gsc_base;
172:
173: r[1] &= ~(1 << irq);
174:
175: cpu_intr_unmap(sc->sc_ih, v);
176: #endif
177: }
178:
179: int
180: gsc_dmamap_create(v, size, nseg, maxsegsz, boundary, flags, dmamp)
181: void *v;
182: bus_size_t size;
183: int nseg;
184: bus_size_t maxsegsz;
185: bus_size_t boundary;
186: int flags;
187: bus_dmamap_t *dmamp;
188: {
189: return 0;
190: }
191:
192: void
193: gsc_dmamap_destroy(v, map)
194: void *v;
195: bus_dmamap_t map;
196: {
197: }
198:
199: int
200: gsc_dmamap_load(v, map, buf, buflen, p, flags)
201: void *v;
202: bus_dmamap_t map;
203: void *buf;
204: bus_size_t buflen;
205: struct proc *p;
206: int flags;
207: {
208: return 0;
209: }
210:
211: int
212: gsc_dmamap_load_mbuf(v, map, mbuf, flags)
213: void *v;
214: bus_dmamap_t map;
215: struct mbuf *mbuf;
216: int flags;
217: {
218: return 0;
219: }
220:
221: int
222: gsc_dmamap_load_uio(v, map, uio, flags)
223: void *v;
224: bus_dmamap_t map;
225: struct uio *uio;
226: int flags;
227: {
228: return 0;
229: }
230:
231: int
232: gsc_dmamap_load_raw(v, map, segs, nsegs, size, flags)
233: void *v;
234: bus_dmamap_t map;
235: bus_dma_segment_t *segs;
236: int nsegs;
237: bus_size_t size;
238: int flags;
239: {
240: return 0;
241: }
242:
243: void
244: gsc_dmamap_unload(v, map)
245: void *v;
246: bus_dmamap_t map;
247: {
248:
249: }
250:
251: void
252: gsc_dmamap_sync(v, map, offset, len, op)
253: void *v;
254: bus_dmamap_t map;
255: bus_addr_t offset;
256: bus_size_t len;
257: int op;
258: {
259:
260: }
261:
262: int
263: gsc_dmamem_alloc(v, size, alignment, boundary, segs, nsegs, rsegs, flags)
264: void *v;
265: bus_size_t size;
266: bus_size_t alignment;
267: bus_size_t boundary;
268: bus_dma_segment_t *segs;
269: int nsegs;
270: int *rsegs;
271: int flags;
272: {
273: return 0;
274: }
275:
276: void
277: gsc_dmamem_free(v, segs, nsegs)
278: void *v;
279: bus_dma_segment_t *segs;
280: int nsegs;
281: {
282:
283: }
284:
285: int
286: gsc_dmamem_map(v, segs, nsegs, size, kvap, flags)
287: void *v;
288: bus_dma_segment_t *segs;
289: int nsegs;
290: size_t size;
291: caddr_t *kvap;
292: int flags;
293: {
294: return 0;
295: }
296:
297: void
298: gsc_dmamem_unmap(v, kva, size)
299: void *v;
300: caddr_t kva;
301: size_t size;
302: {
303:
304: }
305:
306: paddr_t
307: gsc_dmamem_mmap(v, segs, nsegs, off, prot, flags)
308: void *v;
309: bus_dma_segment_t *segs;
310: int nsegs;
311: off_t off;
312: int prot;
313: int flags;
314: {
315: return (-1);
316: }
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