Annotation of sys/arch/hp300/stand/include/grf_dvreg.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: grf_dvreg.h,v 1.1 2005/01/19 17:09:32 miod Exp $ */
2: /* $NetBSD: grf_dvreg.h,v 1.5 1994/10/26 07:23:50 cgd Exp $ */
3:
4: /*
5: * Copyright (c) 1988 University of Utah.
6: * Copyright (c) 1990, 1993
7: * The Regents of the University of California. All rights reserved.
8: *
9: * This code is derived from software contributed to Berkeley by
10: * the Systems Programming Group of the University of Utah Computer
11: * Science Department.
12: *
13: * Redistribution and use in source and binary forms, with or without
14: * modification, are permitted provided that the following conditions
15: * are met:
16: * 1. Redistributions of source code must retain the above copyright
17: * notice, this list of conditions and the following disclaimer.
18: * 2. Redistributions in binary form must reproduce the above copyright
19: * notice, this list of conditions and the following disclaimer in the
20: * documentation and/or other materials provided with the distribution.
21: * 3. Neither the name of the University nor the names of its contributors
22: * may be used to endorse or promote products derived from this software
23: * without specific prior written permission.
24: *
25: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35: * SUCH DAMAGE.
36: *
37: * from: Utah $Hdr: grf_dvreg.h 1.5 92/01/21$
38: *
39: * @(#)grf_dvreg.h 8.1 (Berkeley) 6/10/93
40: */
41:
42: #include <hp300/dev/iotypes.h> /* XXX */
43:
44: /*
45: * Map of the DaVinci frame buffer controller chip in memory ...
46: */
47:
48: #define db_waitbusy(regaddr) \
49: while (((struct dvboxfb *)(regaddr))->wbusy || \
50: ((struct dvboxfb *)(regaddr))->as_busy) DELAY(100)
51:
52: struct rgb {
53: u_char :8, :8, :8;
54: vu_char red;
55: u_char :8, :8, :8;
56: vu_char green;
57: u_char :8, :8, :8;
58: vu_char blue;
59: };
60:
61: struct dvboxfb {
62: u_char :8;
63: vu_char reset; /* reset register 0x01 */
64: u_char fb_address; /* frame buffer address 0x02 */
65: vu_char interrupt; /* interrupt register 0x03 */
66: u_char :8;
67: vu_char fbwmsb; /* frame buffer width MSB 0x05 */
68: u_char :8;
69: vu_char fbwlsb; /* frame buffer width MSB 0x07 */
70: u_char :8;
71: vu_char fbhmsb; /* frame buffer height MSB 0x09 */
72: u_char :8;
73: vu_char fbhlsb; /* frame buffer height MSB 0x0b */
74: u_char :8;
75: vu_char dwmsb; /* display width MSB 0x0d */
76: u_char :8;
77: vu_char dwlsb; /* display width MSB 0x0f */
78: u_char :8;
79: vu_char dhmsb; /* display height MSB 0x11 */
80: u_char :8;
81: vu_char dhlsb; /* display height MSB 0x13 */
82: u_char :8;
83: vu_char fbid; /* frame buffer id 0x15 */
84: u_char f1[0x47];
85: vu_char fbomsb; /* frame buffer offset MSB 0x5d */
86: u_char :8;
87: vu_char fbolsb; /* frame buffer offset LSB 0x5f */
88: u_char f2[16359];
89: vu_char wbusy; /* Window move in progress 0x4047 */
90: u_char f3[0x405b-0x4047-1];
91: vu_char as_busy; /* Scan accessing frame buf. 0x405B */
92: u_char f4[0x4090-0x405b-1];
93: vu_int fbwen; /* Frame buffer write enable 0x4090 */
94: u_char f5[0x409f-0x4090-4];
95: vu_char wmove; /* Initiate window move. 0x409F */
96: u_char f6[0x40b3-0x409f-1];
97: vu_char fold; /* Byte/longword per pixel 0x40B3 */
98: u_char f7[0x40b7-0x40b3-1];
99: vu_char opwen; /* Overlay plane write enable 0x40B7 */
100: u_char f8[0x40bf-0x40b7-1];
101: vu_char drive; /* Select FB vs. Overlay. 0x40BF */
102:
103: u_char f8a[0x40cb-0x40bf-1];
104: vu_char zconfig; /* Z buffer configuration 0x40CB */
105: u_char f8b[0x40cf-0x40cb-1];
106: vu_char alt_rr; /* Alternate replacement rule 0x40CF */
107: u_char f8c[0x40d3-0x40cf-1];
108: vu_char zrr; /* Z replacement rule 0x40D3 */
109:
110: u_char f9[0x40d7-0x40d3-1];
111: vu_char en_scan; /* Enable scan DTACK. 0x40D7 */
112: u_char f10[0x40ef-0x40d7-1];
113: vu_char rep_rule; /* Replacement rule 0x40EF */
114: u_char f11[0x40f2-0x40ef-1];
115: vu_short source_x; /* Window source X origin 0x40F2 */
116: u_char f12[0x40f6-0x40f2-2];
117: vu_short source_y; /* Window source Y origin 0x40F6 */
118: u_char f13[0x40fa-0x40f6-2];
119: vu_short dest_x; /* Window dest X origin 0x40FA */
120: u_char f14[0x40fe -0x40fa-2];
121: vu_short dest_y; /* Window dest Y origin 0x40FE */
122: u_char f15[0x4102-0x40fe -2];
123: vu_short wwidth; /* Window width 0x4102 */
124: u_char f16[0x4106-0x4102-2];
125: vu_short wheight; /* Window height 0x4106 */
126: u_char f17[0x6003-0x4106-2];
127: vu_char cmapbank; /* Bank select (0 or 1) 0x6003 */
128: u_char f18[0x6007-0x6003-1];
129: vu_char dispen; /* Display enable 0x6007 */
130:
131: u_char f18a[0x600B-0x6007-1];
132: vu_char fbvenp; /* Frame buffer video enable 0x600B */
133: u_char f18b[0x6017-0x600B-1];
134: vu_char fbvens; /* fbvenp blink counterpart 0x6017 */
135:
136: u_char f19[0x6023-0x6017-1];
137: vu_char vdrive; /* Video display mode 0x6023 */
138: u_char f20[0x6083-0x6023-1];
139: vu_char panxh; /* Pan display in X (high) 0x6083 */
140: u_char f21[0x6087-0x6083-1];
141: vu_char panxl; /* Pan display in X (low) 0x6087 */
142: u_char f22[0x608b-0x6087-1];
143: vu_char panyh; /* Pan display in Y (high) 0x608B */
144: u_char f23[0x608f-0x608b-1];
145: vu_char panyl; /* Pan display in Y (low) 0x608F */
146: u_char f24[0x6093-0x608f-1];
147: vu_char zoom; /* Zoom factor 0x6093 */
148: u_char f25[0x6097-0x6093-1];
149: vu_char pz_trig; /* Pan & zoom trigger 0x6097 */
150: u_char f26[0x609b-0x6097-1];
151: vu_char ovly0p; /* Overlay 0 primary map 0x609B */
152: u_char f27[0x609f-0x609b-1];
153: vu_char ovly1p; /* Overlay 1 primary map 0x609F */
154: u_char f28[0x60a3-0x609f-1];
155: vu_char ovly0s; /* Overlay 0 secondary map 0x60A3 */
156: u_char f29[0x60a7-0x60a3-1];
157: vu_char ovly1s; /* Overlay 1 secondary map 0x60A7 */
158: u_char f30[0x60ab-0x60a7-1];
159: vu_char opvenp; /* Overlay video enable 0x60AB */
160: u_char f31[0x60af-0x60ab-1];
161: vu_char opvens; /* Overlay blink enable 0x60AF */
162: u_char f32[0x60b3-0x60af-1];
163: vu_char fv_trig; /* Trigger control registers 0x60B3 */
164: u_char f33[0x60b7-0x60b3-1];
165: vu_char cdwidth; /* Iris cdwidth timing reg. 0x60B7 */
166: u_char f34[0x60bb-0x60b7-1];
167: vu_char chstart; /* Iris chstart timing reg. 0x60BB */
168: u_char f35[0x60bf-0x60bb-1];
169: vu_char cvwidth; /* Iris cvwidth timing reg. 0x60BF */
170: u_char f36[0x6100-0x60bf-1];
171: struct rgb rgb[8]; /* overlay color map */
172: u_char f37[0x6403-0x6100-sizeof(struct rgb)*8];
173: vu_char red0;
174: u_char f38[0x6803-0x6403-1];
175: vu_char green0;
176: u_char f39[0x6c03-0x6803-1];
177: vu_char blue0;
178: u_char f40[0x7403-0x6c03-1];
179: vu_char red1;
180: u_char f41[0x7803-0x7403-1];
181: vu_char green1;
182: u_char f42[0x7c03-0x7803-1];
183: vu_char blue1;
184: u_char f43[0x8012-0x7c03-1];
185: vu_short status1; /* Master Status register 0x8012 */
186: u_char f44[0xC226-0x8012-2];
187: vu_short trans; /* Transparency 0xC226 */
188: u_char f45[0xC23E -0xC226-2];
189: vu_short pstop; /* Pace value control 0xc23e */
190: };
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