Annotation of sys/arch/hp300/include/intr.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: intr.h,v 1.20 2007/05/25 21:27:15 krw Exp $ */
2: /* $NetBSD: intr.h,v 1.2 1997/07/24 05:43:08 scottr Exp $ */
3:
4: /*-
5: * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
31: * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
39:
40: #ifndef _HP300_INTR_H_
41: #define _HP300_INTR_H_
42:
43: #include <machine/psl.h>
44: #include <sys/evcount.h>
45: #include <sys/queue.h>
46:
47: #ifdef _KERNEL
48: struct isr {
49: LIST_ENTRY(isr) isr_link;
50: int (*isr_func)(void *);
51: void *isr_arg;
52: int isr_ipl;
53: int isr_priority;
54: struct evcount isr_count;
55: };
56:
57: /*
58: * These four globals contain the appropriate PSL_S|PSL_IPL? values
59: * to raise interrupt priority to the requested level.
60: */
61: extern unsigned short hp300_bioipl;
62: extern unsigned short hp300_netipl;
63: extern unsigned short hp300_ttyipl;
64: extern unsigned short hp300_vmipl;
65:
66: /*
67: * Interrupt "levels". These are a more abstract representation
68: * of interrupt levels, and do not have the same meaning as m68k
69: * CPU interrupt levels. They serve two purposes:
70: *
71: * - properly order ISRs in the list for that CPU ipl
72: * - compute CPU PSL values for the spl*() calls.
73: */
74: #define IPL_NONE 0
75: #define IPL_SOFTNET 1
76: #define IPL_SOFTCLOCK 1
77: #define IPL_BIO 1
78: #define IPL_NET 2
79: #define IPL_TTY 3
80: #define IPL_TTYNOBUF 4 /* XXX */
81: #define IPL_CLOCK 6
82: #define IPL_STATCLOCK 6
83: #define IPL_HIGH 7
84:
85: /* These spl calls are used by machine-independent code. */
86: #define splsoft() _splraise(PSL_S | PSL_IPL1)
87: #define splsoftclock() splsoft()
88: #define splsoftnet() splsoft()
89: #define splbio() _splraise(hp300_bioipl)
90: #define splnet() _splraise(hp300_netipl)
91: #define spltty() _splraise(hp300_ttyipl)
92: #define splclock() _splraise(PSL_S | PSL_IPL6)
93: #define splstatclock() _splraise(PSL_S | PSL_IPL6)
94: #define splvm() _splraise(hp300_vmipl)
95: #define splhigh() _spl(PSL_S | PSL_IPL7)
96: #define splsched() splhigh()
97:
98: /* watch out for side effects */
99: #define splx(s) ((s) & PSL_IPL ? _spl((s)) : spl0())
100:
101: /*
102: * Simulated software interrupt register.
103: */
104: extern volatile u_int8_t ssir;
105:
106: #define SIR_NET 0x01
107: #define SIR_CLOCK 0x02
108:
109: #define siron(mask) \
110: __asm __volatile ( "orb %1,%0" : "=m" (ssir) : "i" (mask))
111: #define siroff(mask) \
112: __asm __volatile ( "andb %1,%0" : "=m" (ssir) : "ir" (~(mask)))
113:
114: #define setsoftnet() siron(SIR_NET)
115: #define setsoftclock() siron(SIR_CLOCK)
116:
117: /* locore.s */
118: int spl0(void);
119:
120: /* intr.c */
121: void intr_init(void);
122: void intr_establish(struct isr *, const char *);
123: void intr_disestablish(struct isr *);
124: void intr_dispatch(int);
125: void intr_printlevels(void);
126: #endif /* _KERNEL */
127:
128: #endif /* _HP300_INTR_H_ */
CVSweb
![[BACK]](/icons/back.gif){kind=icon}
Return to intr.h CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [local] / sys / arch / hp300 / include