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Annotation of sys/arch/hp300/dev/rboxreg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: rboxreg.h,v 1.2 2005/01/24 21:36:39 miod Exp $        */
                      2: /*     $NetBSD: grf_rbreg.h,v 1.4 1994/10/26 07:24:03 cgd Exp $        */
                      3:
                      4: /*
                      5:  * Copyright (c) 1988 University of Utah.
                      6:  * Copyright (c) 1990, 1993
                      7:  *     The Regents of the University of California.  All rights reserved.
                      8:  *
                      9:  * This code is derived from software contributed to Berkeley by
                     10:  * the Systems Programming Group of the University of Utah Computer
                     11:  * Science Department.
                     12:  *
                     13:  * Redistribution and use in source and binary forms, with or without
                     14:  * modification, are permitted provided that the following conditions
                     15:  * are met:
                     16:  * 1. Redistributions of source code must retain the above copyright
                     17:  *    notice, this list of conditions and the following disclaimer.
                     18:  * 2. Redistributions in binary form must reproduce the above copyright
                     19:  *    notice, this list of conditions and the following disclaimer in the
                     20:  *    documentation and/or other materials provided with the distribution.
                     21:  * 3. Neither the name of the University nor the names of its contributors
                     22:  *    may be used to endorse or promote products derived from this software
                     23:  *    without specific prior written permission.
                     24:  *
                     25:  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
                     26:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
                     27:  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
                     28:  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
                     29:  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
                     30:  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
                     31:  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
                     32:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
                     33:  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
                     34:  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
                     35:  * SUCH DAMAGE.
                     36:  *
                     37:  * from: Utah $Hdr: grf_rbreg.h 1.9 92/01/21$
                     38:  *
                     39:  *     @(#)grf_rbreg.h 8.1 (Berkeley) 6/10/93
                     40:  */
                     41:
                     42: /*
                     43:  * Map of the Renaissance frame buffer controller chip in memory ...
                     44:  */
                     45:
                     46: #define rb_waitbusy(regaddr)                                           \
                     47: do {                                                                   \
                     48:        while (((volatile struct rboxfb *)(regaddr))->wbusy & 0x01)     \
                     49:                DELAY(10);                                              \
                     50: } while (0)
                     51:
                     52: #define        RBOX_DUALROP(rop)       ((rop) << 4 | (rop))
                     53:
                     54: #define        CM1RED(fb)      ((volatile struct rencm  *)((fb)->regkva + 0x6400))
                     55: #define        CM1GRN(fb)      ((volatile struct rencm  *)((fb)->regkva + 0x6800))
                     56: #define        CM1BLU(fb)      ((volatile struct rencm  *)((fb)->regkva + 0x6C00))
                     57: #define        CM2RED(fb)      ((volatile struct rencm  *)((fb)->regkva + 0x7400))
                     58: #define        CM2GRN(fb)      ((volatile struct rencm  *)((fb)->regkva + 0x7800))
                     59: #define        CM2BLU(fb)      ((volatile struct rencm  *)((fb)->regkva + 0x7C00))
                     60:
                     61: struct rencm {
                     62:        u_int8_t  :8, :8, :8;
                     63:        u_int8_t value;
                     64: };
                     65:
                     66: struct rboxfb {
                     67:        struct diofbreg regs;
                     68:        u_int8_t filler2[16359];
                     69:        u_int8_t wbusy;                 /* window mover is active     0x4047 */
                     70:        u_int8_t filler3[0x405b - 0x4048];
                     71:        u_int8_t scanbusy;              /* scan converteris active    0x405B */
                     72:        u_int8_t filler3b[0x4083 - 0x405c];
                     73:        u_int8_t video_enable;          /* drive vid. refresh bus     0x4083 */
                     74:        u_int8_t filler4[3];
                     75:        u_int8_t display_enable;        /* enable the display         0x4087 */
                     76:        u_int8_t filler5[8];
                     77:        u_int32_t write_enable;         /* write enable register      0x4090 */
                     78:        u_int8_t filler6[11];
                     79:        u_int8_t wmove;                 /* start window mover         0x409f */
                     80:        u_int8_t filler7[3];
                     81:        u_int8_t blink;                 /* blink register             0x40a3 */
                     82:        u_int8_t filler8[15];
                     83:        u_int8_t fold;                  /* fold  register             0x40b3 */
                     84:        u_int32_t opwen;                /* overlay plane write enable 0x40b4 */
                     85:        u_int8_t filler9[3];
                     86:        u_int8_t tmode;                 /* Tile mode size             0x40bb */
                     87:        u_int8_t filler9a[3];
                     88:        u_int8_t drive;                 /* drive register             0x40bf */
                     89:        u_int8_t filler10[3];
                     90:        u_int8_t vdrive;                /* vdrive register            0x40c3 */
                     91:        u_int8_t filler10a[0x40cb-0x40c4];
                     92:        u_int8_t zconfig;               /* Z-buffer mode              0x40cb */
                     93:        u_int8_t filler11a[2];
                     94:        u_int16_t tpatt;                /* Transparency pattern       0x40ce */
                     95:        u_int8_t filler11b[3];
                     96:        u_int8_t dmode;                 /* dither mode                0x40d3 */
                     97:        u_int8_t filler11c[3];
                     98:        u_int8_t en_scan;               /* enable scan board to DTACK 0x40d7 */
                     99:        u_int8_t filler11d[0x40ef-0x40d8];
                    100:        u_int8_t rep_rule;              /* replacement rule           0x40ef */
                    101:        u_int8_t filler12[2];
                    102:        u_int16_t source_x;             /* source x                   0x40f2 */
                    103:        u_int8_t filler13[2];
                    104:        u_int16_t source_y;             /* source y                   0x40f6 */
                    105:        u_int8_t filler14[2];
                    106:        u_int16_t dest_x;               /* dest x                     0x40fa */
                    107:        u_int8_t filler15[2];
                    108:        u_int16_t dest_y;               /* dest y                     0x40fe */
                    109:        u_int8_t filler16[2];
                    110:        u_int16_t wwidth;               /* window width               0x4102 */
                    111:        u_int8_t filler17[2];
                    112:        u_int16_t wheight;              /* window height              0x4106 */
                    113:        u_int8_t filler18[18];
                    114:        u_int16_t patt_x;               /* pattern x                  0x411a */
                    115:        u_int8_t filler19[2];
                    116:        u_int16_t patt_y;               /* pattern y                  0x411e */
                    117:        u_int8_t filler20[0x8012 - 0x4120];
                    118:        u_int16_t te_status;            /* transform engine status    0x8012 */
                    119:        u_int8_t filler21[0x1ffff-0x8014];
                    120: };

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