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1.1 nbrk 1: /* $OpenBSD: m8820x.c,v 1.4 2006/05/21 12:22:01 miod Exp $ */
2: /*
3: * Copyright (c) 2004, 2006, Miodrag Vallat.
4: *
5: * Redistribution and use in source and binary forms, with or without
6: * modification, are permitted provided that the following conditions
7: * are met:
8: * 1. Redistributions of source code must retain the above copyright
9: * notice, this list of conditions and the following disclaimer.
10: * 2. Redistributions in binary form must reproduce the above copyright
11: * notice, this list of conditions and the following disclaimer in the
12: * documentation and/or other materials provided with the distribution.
13: *
14: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
16: * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
17: * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
18: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
22: * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
23: * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
24: * POSSIBILITY OF SUCH DAMAGE.
25: */
26:
27: #include <sys/param.h>
28: #include <sys/systm.h>
29:
30: #include <uvm/uvm_extern.h>
31:
32: #include <machine/asm_macro.h>
33: #include <machine/avcommon.h>
34: #include <machine/cmmu.h>
35: #include <machine/cpu.h>
36: #include <machine/m8820x.h>
37: #include <machine/prom.h>
38:
39: /*
40: * This routine sets up the CPU/CMMU configuration.
41: */
42: void
43: m8820x_setup_board_config()
44: {
45: struct m8820x_cmmu *cmmu;
46: struct scm_cpuconfig scc;
47: int type, cpu_num, cmmu_num;
48: volatile u_int *cr;
49: u_int32_t whoami;
50:
51: /*
52: * First, find if any CPU0 CMMU is a 88204. If so, we can
53: * issue the CPUCONFIG system call to get the configuration
54: * details.
55: */
56: if (badaddr((vaddr_t)m8820x_cmmu[0].cmmu_regs, 4) != 0 ||
57: badaddr((vaddr_t)m8820x_cmmu[1].cmmu_regs, 4) != 0) {
58: printf("CPU0: missing CMMUs ???\n");
59: scm_halt();
60: /* NOTREACHED */
61: }
62:
63: cr = (void *)m8820x_cmmu[0].cmmu_regs;
64: type = CMMU_TYPE(cr[CMMU_IDR]);
65:
66: if (type != M88204_ID && type != M88200_ID) {
67: printf("CPU0: unrecognized CMMU type %d\n", type);
68: scm_halt();
69: /* NOTREACHED */
70: }
71:
72: /*
73: * Try and use the CPUCONFIG system call to get all the information
74: * we need. This is theoretically only available on 88204-based
75: * machines, but it can't hurt to give it a try.
76: */
77: if (scm_cpuconfig(&scc) == 0 &&
78: scc.version == SCM_CPUCONFIG_VERSION)
79: goto knowledge;
80:
81: /*
82: * XXX Instead of deciding on the CMMU type, we should decide on
83: * XXX the board type instead. But then, I am not sure not all
84: * XXX 88204-based designs have the WHOAMI register... -- miod
85: */
86: switch (type) {
87: case M88204_ID:
88: /*
89: * Probe CMMU addresses to discover which CPU slots are
90: * populated. Actually, we'll simply check how many upper
91: * slots we can ignore, and keep using badaddr() to cope
92: * with unpopulated slots.
93: */
94: hardprobe:
95: /*
96: * First, we'll assume we are in a 2:1 configuration, thus no
97: * CMMU split scheme in use.
98: */
99: scc.igang = scc.dgang = 1;
100: scc.isplit = scc.dsplit = 0;
101:
102: /*
103: * Probe CMMU addresses to discover which CPU slots are
104: * populated. Actually, we'll simply check how many upper
105: * slots we can ignore, and keep using badaddr() to cope
106: * with unpopulated slots.
107: */
108: cmmu = m8820x_cmmu + 7;
109: for (max_cmmus = 7; max_cmmus != 0; max_cmmus--, cmmu--) {
110: if (badaddr((vaddr_t)cmmu->cmmu_regs, 4) == 0)
111: break;
112: }
113: scc.cpucount = (1 + max_cmmus) >> 1;
114: break;
115:
116: case M88200_ID:
117: /*
118: * Deduce our configuration from the WHOAMI register.
119: */
120: whoami = *(volatile u_int32_t *)AV_WHOAMI;
121: switch ((whoami & 0xf0) >> 4) {
122: case 0: /* 4 CPUs, 8 CMMUs */
123: scc.cpucount = 4;
124: break;
125: case 5: /* 2 CPUs, 4 CMMUs */
126: scc.cpucount = 2;
127: break;
128: case 0x0a: /* 1 CPU, 2 CMMU */
129: scc.cpucount = 1;
130: break;
131: case 3: /* 2 CPUs, 12 CMMUs */
132: case 7: /* 1 CPU, 6 CMMU */
133: printf("MAYDAY, 6:1 CMMU configuration (whoami %x)"
134: " but no CPUCONFIG information\n", whoami);
135: scm_halt();
136: /* NOTREACHED */
137: break;
138: default:
139: printf("unrecognized CMMU configuration, whoami %x\n",
140: whoami);
141: #if 0
142: scm_halt();
143: #else
144: goto hardprobe;
145: #endif
146: }
147: /*
148: * Oh, and we are in a 2:1 configuration, thus no
149: * CMMU split scheme in use.
150: */
151: scc.igang = scc.dgang = 1;
152: scc.isplit = scc.dsplit = 0;
153:
154: break;
155: }
156:
157: knowledge:
158: if (scc.igang != scc.dgang ||
159: scc.igang == 0 || scc.igang > 2) {
160: printf("Unsupported CMMU to CPU ratio (%dI/%dD)\n",
161: scc.igang, scc.dgang);
162: scm_halt();
163: /* NOTREACHED */
164: }
165:
166: max_cpus = scc.cpucount;
167: cmmu_shift = scc.igang == 1 ? 1 : 2;
168: max_cmmus = max_cpus << scc.igang;
169:
170: /*
171: * Now that we know which CMMUs are there, report every association
172: */
173: for (cpu_num = 0; cpu_num < max_cpus; cpu_num++) {
174: cmmu_num = cpu_num << cmmu_shift;
175: cr = m8820x_cmmu[cmmu_num].cmmu_regs;
176: if (badaddr((vaddr_t)cr, 4) == 0) {
177: type = CMMU_TYPE(m8820x_cmmu[cmmu_num].
178: cmmu_regs[CMMU_IDR]);
179:
180: printf("CPU%d is associated to %d MC8820%c CMMUs\n",
181: cpu_num, 1 << cmmu_shift,
182: type == M88204_ID ? '4' : '0');
183: }
184: }
185:
186:
187: /*
188: * Now set up addressing limits
189: */
190: if (cmmu_shift > 1) {
191: for (cmmu_num = 0, cmmu = m8820x_cmmu; cmmu_num < max_cmmus;
192: cmmu_num++, cmmu++) {
193: cpu_num = cmmu_num >> 1; /* CPU view of the CMMU */
194:
195: if (cmmu_num & 1) {
196: /* I0, I1 */
197: cmmu->cmmu_addr = cpu_num < 2 ? 0 : scc.isplit;
198: cmmu->cmmu_addr_mask = scc.isplit;
199: } else {
200: /* D0, D1 */
201: cmmu->cmmu_addr = cpu_num < 2 ? 0 : scc.dsplit;
202: cmmu->cmmu_addr_mask = scc.dsplit;
203: }
204: }
205: }
206: }
207:
208: /*
209: * Find out the CPU number from accessing CMMU.
210: * We access the WHOAMI register, which is in data space;
211: * its value will let us know which CPU has been used to perform the read.
212: */
213: cpuid_t
214: m8820x_cpu_number()
215: {
216: u_int32_t whoami;
217: cpuid_t cpu;
218:
219: whoami = *(volatile u_int32_t *)AV_WHOAMI;
220: switch ((whoami & 0xf0) >> 4) {
221: case 0:
222: case 3:
223: case 5:
224: for (cpu = 0; cpu < 4; cpu++)
225: if (whoami & (1 << cpu))
226: return (cpu);
227: break;
228: case 7:
229: case 0x0a:
230: /* for single processors, this field of whoami is undefined */
231: return (0);
232: }
233:
234: panic("m8820x_cpu_number: could not determine my cpu number, whoami %x",
235: whoami);
236: }