Return to eh.S CVS log

Up to [local] / sys / arch / aviion / aviion

Annotation of sys/arch/aviion/aviion/eh.S, Revision 1.1

1.1     ! nbrk        1: /*     $OpenBSD: eh.S,v 1.2 2006/05/21 12:22:01 miod Exp $     */
        !             2: /*
        !             3:  * Copyright (c) 2006, Miodrag Vallat
        !             4:  *
        !             5:  * Redistribution and use in source and binary forms, with or without
        !             6:  * modification, are permitted provided that the following conditions
        !             7:  * are met:
        !             8:  * 1. Redistributions of source code must retain the above copyright
        !             9:  *    notice, this list of conditions and the following disclaimer.
        !            10:  * 2. Redistributions in binary form must reproduce the above copyright
        !            11:  *    notice, this list of conditions and the following disclaimer in the
        !            12:  *    documentation and/or other materials provided with the distribution.
        !            13:  *
        !            14:  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
        !            15:  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
        !            16:  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
        !            17:  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
        !            18:  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
        !            19:  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
        !            20:  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
        !            21:  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
        !            22:  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
        !            23:  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
        !            24:  * POSSIBILITY OF SUCH DAMAGE.
        !            25:  */
        !            26:
        !            27: #include <machine/m8820x.h>
        !            28:
        !            29: /*
        !            30:  * Save Pbus fault status register from data and inst CMMU.
        !            31:  */
        !            32:
        !            33: #define        PFSR_SAVE \
        !            34:        br.n    _ASM_LABEL(pfsr_av400); \
        !            35:         or.u   TMP2, r0,   hi16(_C_LABEL(cmmu_shift))
        !            36:
        !            37: #include <m88k/m88k/eh_common.S>
        !            38:
        !            39:        text
        !            40:
        !            41: ASLOCAL(pfsr_av400)
        !            42: #if 0  /* done in delay slot from PFSR_SAVE */
        !            43:        or.u    TMP2, r0,   hi16(_C_LABEL(cmmu_shift))
        !            44: #endif
        !            45:        ld      TMP2, TMP2, lo16(_C_LABEL(cmmu_shift))
        !            46:        cmp     TMP3, TMP2, 2
        !            47:        bb1     lt,   TMP2, _ASM_LABEL(pfsr_av400_straight)
        !            48:
        !            49: ASLOCAL(pfsr_av400_double)
        !            50:        /*
        !            51:         * 4 CMMUs per CPU. Almost as simple as the 2 CMMUs per CPU
        !            52:         * situation...
        !            53:         *
        !            54:         * However, to be sure we don't get fooled with already-processed
        !            55:         * exceptions, we have to reset the fault status registers
        !            56:         * after reading them.
        !            57:         */
        !            58:
        !            59:        ld      TMP2, TMP,  CI_PFSR_I0
        !            60:        ld      TMP2, TMP2, r0
        !            61:        extu    TMP3, TMP2, 3<16>
        !            62:        bcnd.n  ne0,  TMP3, 1f
        !            63:         st     r0,   TMP2, r0
        !            64:        ld      TMP2, TMP,  CI_PFSR_I1
        !            65:        ld      TMP2, TMP2, r0
        !            66:        st      r0,   TMP2, r0
        !            67: 1:
        !            68:        st      TMP2, r31,  REG_OFF(EF_IPFSR)
        !            69:
        !            70:        ld      TMP2, TMP,  CI_PFSR_D0
        !            71:        ld      TMP2, TMP2, r0
        !            72:        extu    TMP3, TMP2, 3<16>
        !            73:        bcnd.n  ne0,  TMP3, 2f
        !            74:         st     r0,   TMP2, r0
        !            75:        ld      TMP2, TMP,  CI_PFSR_D1
        !            76:        ld      TMP2, TMP2, r0
        !            77:        st      r0,   TMP2, r0
        !            78: 2:
        !            79:        br.n    _ASM_LABEL(pfsr_done)
        !            80:         st     TMP2, r31,  REG_OFF(EF_DPFSR)
        !            81:
        !            82: ASLOCAL(pfsr_av400_straight)
        !            83:        /*
        !            84:         * We have the simple 2 CMMUs per CPU mapping. Pick our couple;
        !            85:         * no need to reset fault status registers in this case.
        !            86:         */
        !            87:        ld      TMP2, TMP,  CI_PFSR_I0
        !            88:        ld      TMP3, TMP2, r0
        !            89:        st      TMP3, r31,  REG_OFF(EF_IPFSR)
        !            90:        ld      TMP2, TMP,  CI_PFSR_D0
        !            91:        ld      TMP3, TMP2, r0
        !            92:        br.n    _ASM_LABEL(pfsr_done)
        !            93:         st     TMP3, r31,  REG_OFF(EF_DPFSR)