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Annotation of sys/arch/arm/xscale/pxa2x0_a4x_io.S, Revision 1.1.1.1

1.1       nbrk        1: /*     $OpenBSD: pxa2x0_a4x_io.S,v 1.2 2005/01/02 19:52:36 drahn Exp $ */
                      2: /*     $NetBSD: pxa2x0_a4x_io.S,v 1.1 2002/10/19 19:31:39 bsh Exp $ */
                      3:
                      4: /*
                      5:  * Copyright (c) 2002  Genetec Corporation.  All rights reserved.
                      6:  * Written by Hiroyuki Bessho for Genetec Corporation.
                      7:  *
                      8:  * Redistribution and use in source and binary forms, with or without
                      9:  * modification, are permitted provided that the following conditions
                     10:  * are met:
                     11:  * 1. Redistributions of source code must retain the above copyright
                     12:  *    notice, this list of conditions and the following disclaimer.
                     13:  * 2. Redistributions in binary form must reproduce the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer in the
                     15:  *    documentation and/or other materials provided with the distribution.
                     16:  * 3. All advertising materials mentioning features or use of this software
                     17:  *    must display the following acknowledgement:
                     18:  *     This product includes software developed for the NetBSD Project by
                     19:  *     Genetec Corporation.
                     20:  * 4. The name of Genetec Corporation may not be used to endorse or
                     21:  *    promote products derived from this software without specific prior
                     22:  *    written permission.
                     23:  *
                     24:  * THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
                     25:  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     26:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     27:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL GENETEC CORPORATION
                     28:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     29:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     30:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     31:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     32:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     33:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     34:  * POSSIBILITY OF SUCH DAMAGE.
                     35:  */
                     36:
                     37: /*
                     38:  * There are simple bus space functions for IO registers mapped at
                     39:  * 32-bit aligned positions.  offset is multiplied by 4.
                     40:  */
                     41:
                     42: #include <machine/asm.h>
                     43:
                     44: /*
                     45:  * bus_space I/O functions with offset*4
                     46:  */
                     47:
                     48: /*
                     49:  * read single
                     50:  */
                     51:
                     52: ENTRY(a4x_bs_r_1)
                     53:        ldrb    r0, [r1, r2, LSL #2]
                     54:        mov     pc, lr
                     55:
                     56: ENTRY(a4x_bs_r_2)
                     57:        mov     r2, r2, LSL #2
                     58:        ldrh    r0, [r1, r2]
                     59:        mov     pc, lr
                     60:
                     61: ENTRY(a4x_bs_r_4)
                     62:        ldr     r0, [r1, r2, LSL #2]
                     63:        mov     pc, lr
                     64:
                     65: /*
                     66:  * write single
                     67:  */
                     68:
                     69: ENTRY(a4x_bs_w_1)
                     70:        strb    r3, [r1, r2, LSL #2]
                     71:        mov     pc, lr
                     72:
                     73: ENTRY(a4x_bs_w_2)
                     74:        mov     r2, r2, LSL #2
                     75:        strh    r3, [r1, r2]
                     76:        mov     pc, lr
                     77:
                     78: ENTRY(a4x_bs_w_4)
                     79:        str     r3, [r1, r2, LSL #2]
                     80:        mov     pc, lr
                     81:
                     82: /*
                     83:  * read multiple
                     84:  */
                     85: ENTRY(a4x_bs_rm_1)
                     86:        mov r2, r2, LSL #2
                     87:        b generic_bs_rm_1
                     88:
                     89: ENTRY(a4x_bs_rm_2)
                     90:        mov r2, r2, LSL #2
                     91:        b generic_armv4_bs_rm_2
                     92:
                     93:
                     94:
                     95: /*
                     96:  * write multiple
                     97:  */
                     98: ENTRY(a4x_bs_wm_1)
                     99:        mov r2, r2, LSL #2
                    100:        b generic_bs_wm_1
                    101:
                    102: ENTRY(a4x_bs_wm_2)
                    103:        mov r2, r2, LSL #2
                    104:        b generic_armv4_bs_wm_2