Annotation of sys/arch/arm/xscale/i80321_i2c.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: i80321_i2c.c,v 1.2 2006/07/10 15:39:56 drahn Exp $ */
2: /* $NetBSD: i80321_i2c.c,v 1.2 2005/12/11 12:16:51 christos Exp $ */
3:
4: /*
5: * Copyright (c) 2003 Wasabi Systems, Inc.
6: * All rights reserved.
7: *
8: * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed for the NetBSD Project by
21: * Wasabi Systems, Inc.
22: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23: * or promote products derived from this software without specific prior
24: * written permission.
25: *
26: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: * POSSIBILITY OF SUCH DAMAGE.
37: */
38:
39: /*
40: * Intel i80321 I/O Processor I2C Controller Unit support.
41: */
42:
43: #include <sys/param.h>
44: #include <sys/lock.h>
45: #include <sys/systm.h>
46: #include <sys/device.h>
47: #include <sys/kernel.h>
48:
49: #include <machine/bus.h>
50: #include <machine/intr.h>
51:
52: #include <arm/xscale/i80321reg.h>
53: #include <arm/xscale/i80321var.h>
54:
55: #include <dev/i2c/i2cvar.h>
56:
57: #include <arm/xscale/iopi2creg.h>
58: #include <arm/xscale/iopi2cvar.h>
59:
60: int i80321_i2c_match(struct device *parent, void *v, void *aux);
61: void i80321_i2c_attach(struct device *parent, struct device *self, void *aux);
62:
63: struct cfattach i80321_i2c_ca = {
64: sizeof(struct iopiic_softc), i80321_i2c_match, i80321_i2c_attach
65: };
66:
67: int
68: i80321_i2c_match(struct device *parent, void *v, void *aux)
69: {
70: struct cfdata *cf = v;
71: struct iopxs_attach_args *ia = aux;
72:
73: /* XXX thecus will reboot if iopiic1 attaches */
74: if (ia->ia_offset == VERDE_I2C_BASE1)
75: return 0;
76:
77: if (strcmp(cf->cf_driver->cd_name, ia->ia_name) == 0)
78: return (1);
79:
80: return (0);
81: }
82:
83: void
84: i80321_i2c_attach(struct device *parent, struct device *self, void *aux)
85: {
86: struct iopiic_softc *sc = (void *) self;
87: struct iopxs_attach_args *ia = aux;
88: int error;
89: #ifdef LATER
90: uint8_t gpio_bits;
91: #endif
92:
93: printf(": I2C controller\n");
94:
95: sc->sc_st = ia->ia_st;
96: if ((error = bus_space_subregion(sc->sc_st, ia->ia_sh,
97: ia->ia_offset, ia->ia_size,
98: &sc->sc_sh)) != 0) {
99: printf("%s: unable to subregion registers, error = %d\n",
100: sc->sc_dev.dv_xname, error);
101: return;
102: }
103:
104: #ifdef LATER
105: gpio_bits = (ia->ia_offset == VERDE_I2C_BASE0) ?
106: (1U << 7) | (1U << 6) : (1U << 5) | (1U << 4);
107: i80321_gpio_set_val(gpio_bits, 0);
108: i80321_gpio_set_direction(gpio_bits, 0);
109: #endif
110:
111: /* XXX Reset the I2C unit? */
112:
113: lockinit(&sc->sc_buslock, PRIBIO|PCATCH, "iopiiclk", 0, 0);
114:
115: /* XXX We don't currently use interrupts. Fix this some day. */
116: #if 0
117: sc->sc_ih = i80321_intr_establish((ia->ia_offset == VERDE_I2C_BASE0) ?
118: ICU_INT_I2C0 : ICU_INT_I2C1, IPL_BIO, iopiic_intr, sc);
119: if (sc->sc_ih == NULL) {
120: aprint_error("%s: unable to establish interrupt handler\n",
121: sc->sc_dev.dv_xname);
122: return;
123: }
124: #endif
125:
126: /*
127: * Enable the I2C unit as a master.
128: * No, we do not support slave mode.
129: */
130: sc->sc_icr = IIC_ICR_GCD | IIC_ICR_UE | IIC_ICR_SCLE;
131: bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, 0);
132: bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ISAR, 0);
133: bus_space_write_4(sc->sc_st, sc->sc_sh, IIC_ICR, sc->sc_icr);
134:
135: iopiic_attach(sc);
136: }
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