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Annotation of sys/arch/arm/sa11x0/sa11x1_pcicreg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $NetBSD: sa11x1_pcicreg.h,v 1.1 2001/07/08 23:37:54 rjs Exp $   */
                      2:
                      3: /*-
                      4:  * Copyright (c) 2001 The NetBSD Foundation, Inc.
                      5:  * All rights reserved.
                      6:  *
                      7:  * This code is derived from software contributed to The NetBSD Foundation
                      8:  * by IWAMOTO Toshihiro.
                      9:  *
                     10:  * Redistribution and use in source and binary forms, with or without
                     11:  * modification, are permitted provided that the following conditions
                     12:  * are met:
                     13:  * 1. Redistributions of source code must retain the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer.
                     15:  * 2. Redistributions in binary form must reproduce the above copyright
                     16:  *    notice, this list of conditions and the following disclaimer in the
                     17:  *    documentation and/or other materials provided with the distribution.
                     18:  * 3. All advertising materials mentioning features or use of this software
                     19:  *    must display the following acknowledgement:
                     20:  *     This product includes software developed by the NetBSD
                     21:  *     Foundation, Inc. and its contributors.
                     22:  * 4. Neither the name of The NetBSD Foundation nor the names of its
                     23:  *    contributors may be used to endorse or promote products derived
                     24:  *    from this software without specific prior written permission.
                     25:  *
                     26:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
                     27:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     28:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     29:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
                     30:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     31:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     32:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     33:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     34:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     35:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     36:  * POSSIBILITY OF SUCH DAMAGE.
                     37:  */
                     38:
                     39: /* Register locations */
                     40: #define SACPCIC_CR     0x1800
                     41: #define SACPCIC_SSR    0x1804
                     42: #define SACPCIC_SR     0x1808
                     43:
                     44: /* Control register */
                     45: #define CR_S0_RST      0x01    /* 1 = Assert reset */
                     46: #define CR_S1_RST      0x02
                     47: #define CR_S0_FLT      0x04    /* 0 = Float all S0 control lines */
                     48: #define CR_S1_FLT      0x08
                     49: #define CR_S0_PWAITEN  0x10    /* S0_nPWAIT enable */
                     50: #define CR_S1_PWAITEN  0x20
                     51: #define CR_S0_PSE      0x40    /* 0 = 3V card */
                     52: #define CR_S1_PSE      0x80
                     53:
                     54: /* Sleep state register */
                     55: #define SSR_S0         0x01
                     56: #define SSR_S1         0x02
                     57:
                     58: /* Status register */
                     59: #define SR_S0_READY            0x0001
                     60: #define SR_S1_READY            0x0002
                     61: #define SR_S0_CARDDETECT       0x0004
                     62: #define SR_S1_CARDDETECT       0x0008
                     63: #define SR_S0_VS1              0x0010
                     64: #define SR_S0_VS2              0x0020
                     65: #define SR_S1_VS1              0x0040
                     66: #define SR_S1_VS2              0x0080
                     67: #define SR_S0_WP               0x0100
                     68: #define SR_S1_WP               0x0200
                     69: #define SR_S0_BVD1             0x0400
                     70: #define SR_S0_BVD2             0x0800
                     71: #define SR_S1_BVD1             0x1000
                     72: #define SR_S1_BVD2             0x2000
                     73:
                     74: /* IRQ numbers */
                     75: #define IRQ_S0_READY           49
                     76: #define IRQ_S1_READY           50
                     77: #define IRQ_S0_CDVALID         51
                     78: #define IRQ_S1_CDVALID         52
                     79: #define IRQ_S0_BVD1            53
                     80: #define IRQ_S1_BVD1            54