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Annotation of sys/arch/arm/sa11x0/sa11x0_sspreg.h, Revision 1.1

1.1     ! nbrk        1: /*      $NetBSD: sa11x0_sspreg.h,v 1.2 2006/04/11 15:24:24 peter Exp $ */
        !             2:
        !             3: /*-
        !             4:  * Copyright (c) 2001, The NetBSD Foundation, Inc.  All rights reserved.
        !             5:  *
        !             6:  * This code is derived from software contributed to The NetBSD Foundation
        !             7:  * by IWAMOTO Toshihiro.
        !             8:  *
        !             9:  * Redistribution and use in source and binary forms, with or without
        !            10:  * modification, are permitted provided that the following conditions
        !            11:  * are met:
        !            12:  * 1. Redistributions of source code must retain the above copyright
        !            13:  *    notice, this list of conditions and the following disclaimer.
        !            14:  * 2. Redistributions in binary form must reproduce the above copyright
        !            15:  *    notice, this list of conditions and the following disclaimer in the
        !            16:  *    documentation and/or other materials provided with the distribution.
        !            17:  * 3. All advertising materials mentioning features or use of this software
        !            18:  *    must display the following acknowledgement:
        !            19:  *      This product includes software developed by the NetBSD
        !            20:  *      Foundation, Inc. and its contributors.
        !            21:  * 4. Neither the name of The NetBSD Foundation nor the names of its
        !            22:  *    contributors may be used to endorse or promote products derived
        !            23:  *    from this software without specific prior written permission.
        !            24:  *
        !            25:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
        !            26:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
        !            27:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
        !            28:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
        !            29:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
        !            30:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
        !            31:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
        !            32:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
        !            33:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
        !            34:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
        !            35:  * POSSIBILITY OF SUCH DAMAGE.
        !            36:  */
        !            37:
        !            38: /* SA11[01]0 integrated SSP (synchronous serial port) interface */
        !            39:
        !            40: #define SASSP_FREQ     (3686400 / 2)
        !            41: #define SASSPSPEED(b)  (SACOM_FREQ / (b) - 1)
        !            42:
        !            43: /* size of I/O space */
        !            44: #define SASSP_NPORTS   30
        !            45:
        !            46: #define SASSP_TXFIFOLEN                8
        !            47: #define SASSP_RXFIFOLEN                12
        !            48:
        !            49: /* SSP control register 0 */
        !            50: #define SASSP_CR0      0x60
        !            51: #define CR0_DSS_MASK   0x000F  /* Data size select */
        !            52: #define CR0_FRF_MASK   0x0030  /* Frame format */
        !            53: #define CR0_SSE                0x0080  /* SSP enable */
        !            54: #define CR0_SCR_MASK   0xFF00  /* Serial clock rate */
        !            55:
        !            56: /* SSP control register 1 */
        !            57: #define SASSP_CR1      0x64
        !            58: #define CR1_RIE                0x01    /* Receive FIFO interrupt enable */
        !            59: #define CR1_TIE                0x02    /* Transmit FIFO interrupt enable */
        !            60: #define CR1_LBM                0x04    /* Loopback mode */
        !            61: #define CR1_SPO                0x08    /* Serial clock polarity */
        !            62: #define CR1_SPH                0x10    /* Serial clock phase */
        !            63: #define CR1_ECS                0x20    /* External clock select */
        !            64:
        !            65: /* SSP data register */
        !            66: #define SASSP_DR       0x6C
        !            67:
        !            68: /* SSP status register */
        !            69: #define SASSP_SR       0x74
        !            70: #define SR_TNF         0x02    /* Transmit FIFO not full */
        !            71: #define SR_RNE         0x04    /* Receive FIFO not empty */
        !            72: #define SR_BSY         0x08    /* SSP busy flag */
        !            73: #define SR_TFS         0x10    /* Transmit FIFO service request */
        !            74: #define SR_RFS         0x20    /* Receive FIFO service request */
        !            75: #define SR_ROR         0x40    /* Receive FIFO overrrun */