Annotation of sys/arch/arm/sa11x0/sa11x0_space.c, Revision 1.2
1.1 nbrk 1: /* $OpenBSD: sa11x0_space.c,v 1.3 2005/07/18 02:43:24 fgsch Exp $ */
2: /* $NetBSD: sa11x0_space.c,v 1.5 2004/06/07 19:45:22 nathanw Exp $ */
3:
4: /*
5: * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
6: * All rights reserved.
7: *
8: * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed for the NetBSD Project by
21: * Wasabi Systems, Inc.
22: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23: * or promote products derived from this software without specific prior
24: * written permission.
25: *
26: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: * POSSIBILITY OF SUCH DAMAGE.
37: */
38: /*
39: * Copyright (c) 1997 Mark Brinicombe.
40: * Copyright (c) 1997 Causality Limited.
41: * All rights reserved.
42: *
43: * This code is derived from software contributed to The NetBSD Foundation
44: * by Ichiro FUKUHARA.
45: *
46: * Redistribution and use in source and binary forms, with or without
47: * modification, are permitted provided that the following conditions
48: * are met:
49: * 1. Redistributions of source code must retain the above copyright
50: * notice, this list of conditions and the following disclaimer.
51: * 2. Redistributions in binary form must reproduce the above copyright
52: * notice, this list of conditions and the following disclaimer in the
53: * documentation and/or other materials provided with the distribution.
54: * 3. All advertising materials mentioning features or use of this software
55: * must display the following acknowledgement:
56: * This product includes software developed by Mark Brinicombe.
57: * 4. The name of the company nor the name of the author may be used to
58: * endorse or promote products derived from this software without specific
59: * prior written permission.
60: *
61: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
62: * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
63: * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
64: * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
65: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
66: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
67: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
68: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
69: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71: * SUCH DAMAGE.
72: */
73:
74: /*
75: * bus_space functions for Intel PXA2[51]0 application processor.
76: * Derived from i80321_space.c.
77: */
78:
79: #include <sys/cdefs.h>
80: /*
81: __KERNEL_RCSID(0, "$NetBSD: sa11x0_space.c,v 1.5 2004/06/07 19:45:22 nathanw Exp $");
82: */
83:
84: #include <sys/param.h>
85: #include <sys/systm.h>
86:
87: #include <uvm/uvm_extern.h>
88:
89: #include <machine/bus.h>
90:
1.2 ! nbrk 91: /* XXX */
! 92: uint8_t sa11x0_h_bs_r_1(void *t, bus_space_handle_t bsh, bus_size_t addr);
! 93:
1.1 nbrk 94: /* Prototypes for all the bus_space structure functions */
95: bs_protos(sa11x0);
96: bs_protos(generic);
97: bs_protos(generic_armv4);
98: bs_protos(bs_notimpl);
99:
100: struct bus_space sa11x0_bs_tag = {
101: /* cookie */
102: (void *) 0,
103:
104: /* mapping/unmapping */
105: sa11x0_bs_map,
106: sa11x0_bs_unmap,
107: sa11x0_bs_subregion,
108:
109: /* allocation/deallocation */
110: sa11x0_bs_alloc, /* not implemented */
111: sa11x0_bs_free, /* not implemented */
112:
113: /* get kernel virtual address */
114: sa11x0_bs_vaddr,
115:
116: /* mmap */
117: bs_notimpl_bs_mmap,
118:
119: /* barrier */
120: sa11x0_bs_barrier,
121:
122: /* read (single) */
1.2 ! nbrk 123: // bs_notimpl_bs_r_1,
! 124: sa11x0_h_bs_r_1, /* XXX hack for pcmcia */
1.1 nbrk 125: bs_notimpl_bs_r_2,
126: generic_bs_r_4,
127: bs_notimpl_bs_r_8,
128:
129: /* read multiple */
130: bs_notimpl_bs_rm_1,
131: bs_notimpl_bs_rm_2,
132: generic_bs_rm_4,
133: bs_notimpl_bs_rm_8,
134:
135: /* read region */
136: /* XXX only word-wide transactions on APB */
137: generic_bs_rr_1,
138: generic_armv4_bs_rr_2,
139: generic_bs_rr_4,
140: bs_notimpl_bs_rr_8,
141:
142: /* write (single) */
143: bs_notimpl_bs_w_1,
144: bs_notimpl_bs_w_2,
145: generic_bs_w_4,
146: bs_notimpl_bs_w_8,
147:
148: /* write multiple */
149: bs_notimpl_bs_wm_1,
150: bs_notimpl_bs_wm_2,
151: generic_bs_wm_4,
152: bs_notimpl_bs_wm_8,
153:
154: /* write region */
155: /* XXX only word-wide transactions on APB */
156: generic_bs_wr_1,
157: generic_armv4_bs_wr_2,
158: generic_bs_wr_4,
159: bs_notimpl_bs_wr_8,
160:
161: /* set multiple */
162: bs_notimpl_bs_sm_1,
163: bs_notimpl_bs_sm_2,
164: bs_notimpl_bs_sm_4,
165: bs_notimpl_bs_sm_8,
166:
167: /* set region */
168: generic_bs_sr_1,
169: generic_armv4_bs_sr_2,
170: bs_notimpl_bs_sr_4,
171: bs_notimpl_bs_sr_8,
172:
173: /* copy */
174: bs_notimpl_bs_c_1,
175: generic_armv4_bs_c_2,
176: bs_notimpl_bs_c_4,
177: bs_notimpl_bs_c_8,
178: };
179:
180: int
181: sa11x0_bs_map(void *t, bus_addr_t bpa, bus_size_t size,
182: int flag, bus_space_handle_t *bshp)
183: {
184: u_long startpa, endpa, pa;
185: vaddr_t va;
186: pt_entry_t *pte;
187:
188: if ((u_long)bpa > (u_long)KERNEL_BASE) {
189: /* Some IO registers (ex. UART ports for console)
190: are mapped to fixed address by board specific
191: routine. */
192: *bshp = bpa;
193: return(0);
194: }
195:
196: startpa = trunc_page(bpa);
197: endpa = round_page(bpa + size);
198:
199: /* XXX use extent manager to check duplicate mapping */
200:
201: va = uvm_km_valloc(kernel_map, endpa - startpa);
202: if (! va)
203: return(ENOMEM);
204:
205: *bshp = (bus_space_handle_t)(va + (bpa - startpa));
206:
207: for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
208: pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE);
209: if ((flag & BUS_SPACE_MAP_CACHEABLE) == 0) {
210: pte = vtopte(va);
211: *pte &= ~L2_S_CACHE_MASK;
212: PTE_SYNC(pte);
213: /* XXX: pmap_kenter_pa() also does PTE_SYNC(). a bit of
214: * waste.
215: */
216: }
217: }
218: pmap_update(pmap_kernel());
219:
220: return(0);
221: }
222:
223: void
224: sa11x0_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
225: {
226:
227: if (bsh > (u_long)KERNEL_BASE)
228: return;
229:
230: uvm_km_free(kernel_map, bsh, size);
231: }
232:
233:
234: int
235: sa11x0_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
236: bus_size_t size, bus_space_handle_t *nbshp)
237: {
238:
239: *nbshp = bsh + offset;
240: return (0);
241: }
242:
243: void
244: sa11x0_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
245: bus_size_t len, int flags)
246: {
247:
248: /* Nothing to do. */
249: }
250:
251: void *
252: sa11x0_bs_vaddr(void *t, bus_space_handle_t bsh)
253: {
254:
255: return ((void *)bsh);
256: }
257:
258:
259: int
260: sa11x0_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
261: bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
262: bus_addr_t *bpap, bus_space_handle_t *bshp)
263: {
264:
265: panic("sa11x0_io_bs_alloc(): not implemented");
266: }
267:
268: void
269: sa11x0_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
270: {
271:
272: panic("sa11x0_io_bs_free(): not implemented");
1.2 ! nbrk 273: }
! 274:
! 275: uint8_t
! 276: sa11x0_h_bs_r_1(void *t, bus_space_handle_t bsh, bus_size_t addr)
! 277: {
! 278: return( bus_space_read_4((bus_space_tag_t)t, bsh, addr) & 0xff );
1.1 nbrk 279: }
280:
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