[BACK]Return to sa11x0_intr.h CVS log [TXT][DIR] Up to [local] / sys / arch / arm / sa11x0

File: [local] / sys / arch / arm / sa11x0 / sa11x0_intr.h (download)

Revision 1.1, Tue Mar 4 16:05:17 2008 UTC (16 years, 2 months ago) by nbrk
Branch point for: MAIN

Initial revision

/*	$OpenBSD: pxa2x0_intr.h,v 1.11 2007/05/19 15:47:16 miod Exp $ */
/*	$NetBSD: pxa2x0_intr.h,v 1.4 2003/07/05 06:53:08 dogcow Exp $ */

/* Derived from i80321_intr.h */

/*
 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
 * All rights reserved.
 *
 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed for the NetBSD Project by
 *	Wasabi Systems, Inc.
 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
 *    or promote products derived from this software without specific prior
 *    written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _SA11X0_INTR_H_
#define _SA11X0_INTR_H_

#define	ARM_IRQ_HANDLER	_C_LABEL(sa11x0_irq_handler)

#ifndef _LOCORE

#include <arm/armreg.h>
#include <arm/cpufunc.h>
#include <arm/softintr.h>

#include <arm/sa11x0/sa11x0_var.h>
extern vaddr_t saic_base;

/*
 * Macross to read/write to memory-mapped ICU.
 */
#define read_icu(offset) (*(volatile uint32_t *)(saic_base+(offset)))
#define write_icu(offset,value) \
 (*(volatile uint32_t *)(saic_base+(offset))=(value))

extern __volatile int current_spl_level;
extern __volatile int softint_pending;
extern int sa11x0_imask[];
void sa11x0_do_pending(void);

void sa11x0_setipl(int new);
void sa11x0_splx(int new);
int sa11x0_splraise(int ipl);
int sa11x0_spllower(int ipl);
void sa11x0_setsoftintr(int si);


/*
 * An useful function for interrupt handlers.
 * XXX: This shouldn't be here.
 */
static __inline int
find_first_bit( uint32_t bits )
{
	int count;
	uint32_t mask;

	/*
	 * If we weren't ARMv4 then we would use CLZ insn here (ARMv5 and above).
	 * Since our CPU is SA1 which is ARMv4 we implement this in software.
	 * TODO optimize code.
	 */
	count = 0;
	mask = 1 << 31;	/* we start from MSB */
	for (; mask > 0; mask >>= 1)
		if (bits & mask)
			break;
		else
			count++;

	return 31 - count;
}


int	_splraise(int);
int	_spllower(int);
void	splx(int);
void	_setsoftintr(int);

/*
 * This function *MUST* be called very early on in a port's
 * initarm() function, before ANY spl*() functions are called.
 *
 * The parameter is the virtual address of the SA11x0's Interrupt
 * Controller registers.
 */
void sa11x0_intr_bootstrap(vaddr_t);

void sa11x0_irq_handler(void *);
void * sa11x0_intr_establish(sa11x0_chipset_tag_t ic, int irq, int type, int level,
    int (*ih_fun)(void *), void *ih_arg, char *name);
#if 0
void *sa11x0_intr_establish(int irqno, int level, int (*func)(void *),
    void *cookie, char *name);
#endif
void sa11x0_intr_disestablish(void *cookie);
const char *sa11x0_intr_string(void *cookie);

#ifdef DIAGNOSTIC
/*
 * Although this function is implemented in MI code, it must be in this MD
 * header because we don't want this header to include MI includes.
 */
void splassert_fail(int, int, const char *);
extern int splassert_ctl;
void sa11x0_splassert_check(int, const char *);
#define splassert(__wantipl) do {				\
	if (splassert_ctl > 0) {				\
		sa11x0_splassert_check(__wantipl, __func__);	\
	}							\
} while (0)
#else
#define	splassert(wantipl)	do { /* nothing */ } while (0)
#endif

#endif /* ! _LOCORE */

#endif /* _SA11X0_INTR_H_ */