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Annotation of sys/arch/arm/sa11x0/sa11x0_gpioreg.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $NetBSD: sa11x0_gpioreg.h,v 1.2 2001/07/30 15:58:56 rjs Exp $   */
                      2:
                      3: /*-
                      4:  * Copyright (c) 2001 The NetBSD Foundation, Inc.  All rights reserved.
                      5:  *
                      6:  * This code is derived from software contributed to The NetBSD Foundation
                      7:  * by Ichiro FUKUHARA (ichiro@ichiro.org).
                      8:  *
                      9:  * Redistribution and use in source and binary forms, with or without
                     10:  * modification, are permitted provided that the following conditions
                     11:  * are met:
                     12:  * 1. Redistributions of source code must retain the above copyright
                     13:  *    notice, this list of conditions and the following disclaimer.
                     14:  * 2. Redistributions in binary form must reproduce the above copyright
                     15:  *    notice, this list of conditions and the following disclaimer in the
                     16:  *    documentation and/or other materials provided with the distribution.
                     17:  * 3. All advertising materials mentioning features or use of this software
                     18:  *    must display the following acknowledgement:
                     19:  *     This product includes software developed by the NetBSD
                     20:  *     Foundation, Inc. and its contributors.
                     21:  * 4. Neither the name of The NetBSD Foundation nor the names of its
                     22:  *    contributors may be used to endorse or promote products derived
                     23:  *    from this software without specific prior written permission.
                     24:  *
                     25:  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
                     26:  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
                     27:  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
                     28:  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
                     29:  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
                     30:  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
                     31:  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
                     32:  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
                     33:  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
                     34:  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
                     35:  * POSSIBILITY OF SUCH DAMAGE.
                     36:  */
                     37:
                     38: /*
                     39:  * SA-11x0 GPIO Register
                     40:  */
                     41:
                     42: #define SAGPIO_NPORTS  8
                     43: #define        SAGPIO_NPINS    28
                     44: #define SAGPIO_NINTRPINS       12
                     45:
                     46: /* GPIO pin-level register */
                     47: #define SAGPIO_PLR     0x00
                     48:
                     49: /* GPIO pin direction register */
                     50: #define SAGPIO_PDR     0x04
                     51:
                     52: /* GPIO pin output set register */
                     53: #define SAGPIO_PSR     0x08
                     54:
                     55: /* GPIO pin output clear register */
                     56: #define SAGPIO_PCR     0x0C
                     57:
                     58: /* GPIO rising-edge detect register */
                     59: #define SAGPIO_RER     0x10
                     60:
                     61: /* GPIO falling-edge detect register */
                     62: #define SAGPIO_FER     0x14
                     63:
                     64: /* GPIO edge-detect status register */
                     65: #define SAGPIO_EDR     0x18
                     66:
                     67: /* GPIO alternate function register */
                     68: #define SAGPIO_AFR     0x1C
                     69:
                     70: /* XXX */
                     71: #define GPIO_PIN(x)            (0x00000001 << (x))
                     72:
                     73: /*
                     74:  * SA-11x0 GPIOs parameter
                     75:  */
                     76: /*
                     77: port   name            desc
                     78: 0      Reserved
                     79: 1      Reserved
                     80: 2...9  LDD{8..15}      LCD DATA(8-15)
                     81: 10     SSP_TXD         SSP transmit
                     82: 11     SSP_RXD         SSP receive
                     83: 12     SSP_SCLK        SSP serial clock
                     84: 13     SSP_SFRM        SSP frameclock
                     85: 14     UART_TXD        UART transmit
                     86: 15     UART_RXD        UART receive
                     87: 16     GPCLK_OUT       General-purpose clock out
                     88: 17     Reserved
                     89: 18     UART_SCLK       Sample clock input
                     90: 19     SSP_CLK         Sample clock input
                     91: 20     UART_SCLK3      Sample clock input
                     92: 21     MCP_CLK         MCP dock in
                     93: 22     TREQA           Either TIC request A
                     94: 23     TREQB           Either TIC request B
                     95: 24     Reserved
                     96: 25     RTC             Real Time Clock
                     97: 26     RCLK_OUT        internal clock /2
                     98: 27     32KHZ_OUT       Raw 32.768kHz osc output
                     99:  */