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Annotation of sys/arch/arm/s3c2xx0/s3c2800_intr.h, Revision 1.1.1.1

1.1       nbrk        1: /*     $NetBSD: s3c2800_intr.h,v 1.4 2005/12/11 12:16:51 christos Exp $        */
                      2:
                      3: /*
                      4:  * Copyright (c) 2002 Fujitsu Component Limited
                      5:  * Copyright (c) 2002 Genetec Corporation
                      6:  * All rights reserved.
                      7:  *
                      8:  * Redistribution and use in source and binary forms, with or without
                      9:  * modification, are permitted provided that the following conditions
                     10:  * are met:
                     11:  * 1. Redistributions of source code must retain the above copyright
                     12:  *    notice, this list of conditions and the following disclaimer.
                     13:  * 2. Redistributions in binary form must reproduce the above copyright
                     14:  *    notice, this list of conditions and the following disclaimer in the
                     15:  *    documentation and/or other materials provided with the distribution.
                     16:  * 3. Neither the name of The Fujitsu Component Limited nor the name of
                     17:  *    Genetec corporation may not be used to endorse or promote products
                     18:  *    derived from this software without specific prior written permission.
                     19:  *
                     20:  * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC
                     21:  * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
                     22:  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
                     23:  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
                     24:  * DISCLAIMED.  IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC
                     25:  * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
                     26:  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
                     27:  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
                     28:  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
                     29:  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
                     30:  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
                     31:  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
                     32:  * SUCH DAMAGE.
                     33:  */
                     34:
                     35: #ifndef _S3C2800_INTR_H_
                     36: #define        _S3C2800_INTR_H_
                     37:
                     38: #define        ARM_IRQ_HANDLER _C_LABEL(s3c2800_irq_handler)
                     39:
                     40: #ifndef _LOCORE
                     41:
                     42: #include <arm/s3c2xx0/s3c2800reg.h>
                     43:
                     44: /*
                     45:  * on S3C2800's interrupt controller, interrupt source bits 9, and 29..31 are
                     46:  * reserved. we map software interrupts to those unused bits.
                     47:  */
                     48: #define        SI_TO_IRQBIT(si)  ((si)==SI_SOFTSERIAL? (1<<9) : (1U<<(ICU_LEN+(si))))
                     49:
                     50: #define        get_pending_softint()   (softint_pending & intr_mask)
                     51: #define        update_softintr_mask()  /* empty */
                     52: #define        s3c2xx0_update_hw_mask()        \
                     53:        (*s3c2xx0_intr_mask_reg = intr_mask & global_intr_mask)
                     54:
                     55: #include <arm/s3c2xx0/s3c2xx0_intr.h>
                     56:
                     57: #endif /* ! _LOCORE */
                     58:
                     59: #endif /* _S3C2800_INTR_H_ */