Annotation of sys/arch/arm/mainbus/mainbus_io_asm.S, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: mainbus_io_asm.S,v 1.1 2004/02/01 05:09:49 drahn Exp $ */
2: /* $NetBSD: mainbus_io_asm.S,v 1.1 2001/02/24 19:38:02 reinoud Exp $ */
3:
4: /*
5: * Copyright (c) 1997 Mark Brinicombe.
6: * All rights reserved.
7: *
8: * Redistribution and use in source and binary forms, with or without
9: * modification, are permitted provided that the following conditions
10: * are met:
11: * 1. Redistributions of source code must retain the above copyright
12: * notice, this list of conditions and the following disclaimer.
13: * 2. Redistributions in binary form must reproduce the above copyright
14: * notice, this list of conditions and the following disclaimer in the
15: * documentation and/or other materials provided with the distribution.
16: * 3. All advertising materials mentioning features or use of this software
17: * must display the following acknowledgement:
18: * This product includes software developed by Mark Brinicombe.
19: * 4. The name of the company nor the name of the author may be used to
20: * endorse or promote products derived from this software without specific
21: * prior written permission.
22: *
23: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
24: * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25: * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26: * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27: * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28: * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29: * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33: * SUCH DAMAGE.
34: */
35:
36: #include <machine/asm.h>
37:
38: /*
39: * bus_space I/O functions for mainbus
40: */
41:
42:
43: /*
44: * read single
45: */
46:
47: ENTRY(mainbus_bs_r_1)
48: ldrb r0, [r1, r2, lsl #2]
49: mov pc, lr
50:
51: ENTRY(mainbus_bs_r_2)
52: ldr r0, [r1, r2, lsl #2]
53: bic r0, r0, #0xff000000
54: bic r0, r0, #0x00ff0000
55: mov pc, lr
56:
57: ENTRY(mainbus_bs_r_4)
58: ldr r0, [r1, r2, lsl #2]
59: mov pc, lr
60:
61: /*
62: * write single
63: */
64:
65: ENTRY(mainbus_bs_w_1)
66: strb r3, [r1, r2, lsl #2]
67: mov pc, lr
68:
69: ENTRY(mainbus_bs_w_2)
70: mov r3, r3, lsl #16
71: orr r3, r3, r3, lsr #16
72: str r3, [r1, r2, lsl #2]
73: mov pc, lr
74:
75: ENTRY(mainbus_bs_w_4)
76: str r3, [r1, r2, lsl #2]
77: mov pc, lr
78:
79: /*
80: * read multiple
81: */
82:
83: ENTRY(mainbus_bs_rm_2)
84: add r0, r1, r2, lsl #2
85: mov r1, r3
86: ldr r2, [sp, #0]
87: b _C_LABEL(insw16)
88:
89: /*
90: * write multiple
91: */
92:
93: ENTRY(mainbus_bs_wm_1)
94: add r0, r1, r2, lsl #2
95: ldr r2, [sp, #0]
96:
97: /* Make sure that we have a positive length */
98: cmp r2, #0x00000000
99: movle pc, lr
100:
101: mainbus_wm_1_loop:
102: ldrb r1, [r3], #0x0001
103: str r1, [r0]
104: subs r2, r2, #0x00000001
105: bgt mainbus_wm_1_loop
106:
107: mov pc, lr
108:
109: ENTRY(mainbus_bs_wm_2)
110: add r0, r1, r2, lsl #2
111: mov r1, r3
112: ldr r2, [sp, #0]
113: b _C_LABEL(outsw16)
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