Annotation of sys/arch/arm/include/isa_machdep.h, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: isa_machdep.h,v 1.3 2006/02/12 19:55:39 miod Exp $ */
2: /* $NetBSD: isa_machdep.h,v 1.3 2002/01/07 22:58:07 chris Exp $ */
3:
4: /*-
5: * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to The NetBSD Foundation
9: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10: * NASA Ames Research Center.
11: *
12: * Redistribution and use in source and binary forms, with or without
13: * modification, are permitted provided that the following conditions
14: * are met:
15: * 1. Redistributions of source code must retain the above copyright
16: * notice, this list of conditions and the following disclaimer.
17: * 2. Redistributions in binary form must reproduce the above copyright
18: * notice, this list of conditions and the following disclaimer in the
19: * documentation and/or other materials provided with the distribution.
20: * 3. All advertising materials mentioning features or use of this software
21: * must display the following acknowledgement:
22: * This product includes software developed by the NetBSD
23: * Foundation, Inc. and its contributors.
24: * 4. Neither the name of The NetBSD Foundation nor the names of its
25: * contributors may be used to endorse or promote products derived
26: * from this software without specific prior written permission.
27: *
28: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38: * POSSIBILITY OF SUCH DAMAGE.
39: */
40:
41: #ifndef _ARM32_ISA_MACHDEP_H_
42: #define _ARM32_ISA_MACHDEP_H_
43:
44: #include <machine/bus.h>
45: #include <dev/isa/isadmavar.h>
46:
47: #define __NO_ISA_INTR_CHECK
48: /*
49: * Types provided to machine-independent ISA code.
50: */
51: struct arm32_isa_chipset {
52: /*
53: struct isa_dma_state ic_dmastate;
54: */
55: };
56:
57: typedef struct arm32_isa_chipset *isa_chipset_tag_t;
58:
59: struct device; /* XXX */
60: struct isabus_attach_args; /* XXX */
61:
62: /*
63: * Functions provided to machine-independent ISA code.
64: */
65: void isa_attach_hook(struct device *, struct device *,
66: struct isabus_attach_args *);
67: void *isa_intr_establish(isa_chipset_tag_t ic, int irq, int type,
68: int level, int (*ih_fun)(void *), void *ih_arg, char *name);
69: void isa_intr_disestablish(isa_chipset_tag_t ic, void *handler);
70:
71: #if 0
72: #define isa_dmainit(ic, bst, dmat, d) \
73: _isa_dmainit(&(ic)->ic_dmastate, (bst), (dmat), (d))
74: #define isa_dmacascade(ic, c) \
75: _isa_dmacascade(&(ic)->ic_dmastate, (c))
76: #define isa_dmamaxsize(ic, c) \
77: _isa_dmamaxsize(&(ic)->ic_dmastate, (c))
78: #define isa_dmamap_create(ic, c, s, f) \
79: _isa_dmamap_create(&(ic)->ic_dmastate, (c), (s), (f))
80: #define isa_dmamap_destroy(ic, c) \
81: _isa_dmamap_destroy(&(ic)->ic_dmastate, (c))
82: #define isa_dmastart(ic, c, a, n, p, f, bf) \
83: _isa_dmastart(&(ic)->ic_dmastate, (c), (a), (n), (p), (f), (bf))
84: #define isa_dmaabort(ic, c) \
85: _isa_dmaabort(&(ic)->ic_dmastate, (c))
86: #define isa_dmacount(ic, c) \
87: _isa_dmacount(&(ic)->ic_dmastate, (c))
88: #define isa_dmafinished(ic, c) \
89: _isa_dmafinished(&(ic)->ic_dmastate, (c))
90: #define isa_dmadone(ic, c) \
91: _isa_dmadone(&(ic)->ic_dmastate, (c))
92: #define isa_dmafreeze(ic) \
93: _isa_dmafreeze(&(ic)->ic_dmastate)
94: #define isa_dmathaw(ic) \
95: _isa_dmathaw(&(ic)->ic_dmastate)
96: #define isa_dmamem_alloc(ic, c, s, ap, f) \
97: _isa_dmamem_alloc(&(ic)->ic_dmastate, (c), (s), (ap), (f))
98: #define isa_dmamem_free(ic, c, a, s) \
99: _isa_dmamem_free(&(ic)->ic_dmastate, (c), (a), (s))
100: #define isa_dmamem_map(ic, c, a, s, kp, f) \
101: _isa_dmamem_map(&(ic)->ic_dmastate, (c), (a), (s), (kp), (f))
102: #define isa_dmamem_unmap(ic, c, k, s) \
103: _isa_dmamem_unmap(&(ic)->ic_dmastate, (c), (k), (s))
104: #define isa_dmamem_mmap(ic, c, a, s, o, p, f) \
105: _isa_dmamem_mmap(&(ic)->ic_dmastate, (c), (a), (s), (o), (p), (f))
106: #define isa_drq_alloc(ic, c) \
107: _isa_drq_alloc(&(ic)->ic_dmastate, c)
108: #define isa_drq_free(ic, c) \
109: _isa_drq_free(&(ic)->ic_dmastate, c)
110: #define isa_drq_isfree(ic, c) \
111: _isa_drq_isfree(&(ic)->ic_dmastate, (c))
112: #define isa_malloc(ic, c, s, p, f) \
113: _isa_malloc(&(ic)->ic_dmastate, (c), (s), (p), (f))
114: #define isa_free(a, p) \
115: _isa_free((a), (p))
116: #define isa_mappage(m, o, p) \
117: _isa_mappage((m), (o), (p))
118: #endif
119:
120: /*
121: * ALL OF THE FOLLOWING ARE MACHINE-DEPENDENT, AND SHOULD NOT BE USED
122: * BY PORTABLE CODE.
123: */
124:
125: extern struct arm32_bus_dma_tag isa_bus_dma_tag;
126:
127: /*
128: * Cookie used by ISA DMA. A pointer to one of these is stashed in
129: * the DMA map.
130: */
131: struct arm32_isa_dma_cookie {
132: int id_flags; /* flags; see below */
133:
134: /*
135: * Information about the original buffer used during
136: * DMA map syncs. Note that origbuflen is only used
137: * for ID_BUFTYPE_LINEAR.
138: */
139: void *id_origbuf; /* pointer to orig buffer if
140: bouncing */
141: bus_size_t id_origbuflen; /* ...and size */
142: int id_buftype; /* type of buffer */
143:
144: void *id_bouncebuf; /* pointer to the bounce buffer */
145: bus_size_t id_bouncebuflen; /* ...and size */
146: int id_nbouncesegs; /* number of valid bounce segs */
147: bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer
148: physical memory segments */
149: };
150:
151: /* id_flags */
152: #define ID_MIGHT_NEED_BOUNCE 0x01 /* map could need bounce buffers */
153: #define ID_HAS_BOUNCE 0x02 /* map currently has bounce buffers */
154: #define ID_IS_BOUNCING 0x04 /* map is bouncing current xfer */
155:
156: /* id_buftype */
157: #define ID_BUFTYPE_INVALID 0
158: #define ID_BUFTYPE_LINEAR 1
159: #define ID_BUFTYPE_MBUF 2
160: #define ID_BUFTYPE_UIO 3
161: #define ID_BUFTYPE_RAW 4
162:
163: /* bus space tags */
164: extern struct bus_space isa_io_bs_tag;
165: extern struct bus_space isa_mem_bs_tag;
166:
167: /* ISA chipset */
168: extern struct arm32_isa_chipset isa_chipset_tag;
169:
170: /* for pccons.c */
171: #define MONO_BASE 0x3B4
172: #define MONO_BUF 0x000B0000
173: #define CGA_BASE 0x3D4
174: #define CGA_BUF 0x000B8000
175: #define VGA_BUF 0xA0000
176: #define VGA_BUF_LEN (0xBFFFF - 0xA0000)
177:
178: void isa_init(vaddr_t, vaddr_t);
179: void isa_io_init(vaddr_t, vaddr_t);
180: void isa_dma_init(void);
181: vaddr_t isa_io_data_vaddr(void);
182: vaddr_t isa_mem_data_vaddr(void);
183: int isa_intr_alloc(isa_chipset_tag_t ic, int mask, int type, int *irq);
184: void isa_intr_init(void);
185:
186: /*
187: * Miscellanous functions.
188: */
189: void isa_fillw(u_int val, void *addr, size_t len);
190:
191: #endif /* _ARM32_ISA_MACHDEP_H_ XXX */
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