Annotation of sys/arch/arm/arm/softintr.c, Revision 1.1.1.1
1.1 nbrk 1: /* $OpenBSD: softintr.c,v 1.4 2007/05/29 18:10:42 miod Exp $ */
2: /* $NetBSD: softintr.c,v 1.2 2003/07/15 00:24:39 lukem Exp $ */
3:
4: /*
5: * Copyright (c) 2001 Wasabi Systems, Inc.
6: * All rights reserved.
7: *
8: * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed for the NetBSD Project by
21: * Wasabi Systems, Inc.
22: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23: * or promote products derived from this software without specific prior
24: * written permission.
25: *
26: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: * POSSIBILITY OF SUCH DAMAGE.
37: */
38:
39: #include <sys/param.h>
40: #include <sys/malloc.h>
41:
42: /* XXX Network interrupts should be converted to new softintrs. */
43: #include <net/netisr.h>
44:
45: #include <uvm/uvm_extern.h>
46:
47: #include <machine/atomic.h>
48: #include <machine/intr.h>
49:
50: struct soft_intrq soft_intrq[SI_NQUEUES];
51:
52: struct soft_intrhand *softnet_intrhand;
53:
54: void netintr(void);
55:
56: /*
57: * softintr_init:
58: *
59: * Initialize the software interrupt system.
60: */
61: void
62: softintr_init(void)
63: {
64: struct soft_intrq *siq;
65: int i;
66:
67: for (i = 0; i < SI_NQUEUES; i++) {
68: siq = &soft_intrq[i];
69: TAILQ_INIT(&siq->siq_list);
70: siq->siq_si = i;
71: }
72:
73: /* XXX Establish legacy software interrupt handlers. */
74: softnet_intrhand = softintr_establish(IPL_SOFTNET,
75: (void (*)(void *))netintr, NULL);
76:
77: assert(softnet_intrhand != NULL);
78: }
79:
80: /*
81: * softintr_dispatch:
82: *
83: * Process pending software interrupts on the specified queue.
84: *
85: * NOTE: We must already be at the correct interrupt priority level.
86: */
87: void
88: softintr_dispatch(int si)
89: {
90: struct soft_intrq *siq = &soft_intrq[si];
91: struct soft_intrhand *sih;
92: int oldirqstate;
93:
94: for (;;) {
95: oldirqstate = disable_interrupts(I32_bit);
96: sih = TAILQ_FIRST(&siq->siq_list);
97: if (sih == NULL) {
98: restore_interrupts(oldirqstate);
99: break;
100: }
101:
102: TAILQ_REMOVE(&siq->siq_list, sih, sih_list);
103: sih->sih_pending = 0;
104:
105: uvmexp.softs++;
106:
107: restore_interrupts(oldirqstate);
108:
109: (*sih->sih_func)(sih->sih_arg);
110: }
111: }
112:
113: /*
114: * softintr_establish: [interface]
115: *
116: * Register a software interrupt handler.
117: */
118: void *
119: softintr_establish(int ipl, void (*func)(void *), void *arg)
120: {
121: struct soft_intrhand *sih;
122: int si;
123:
124: switch (ipl) {
125: case IPL_SOFT:
126: si = SI_SOFT;
127: break;
128:
129: case IPL_SOFTCLOCK:
130: si = SI_SOFTCLOCK;
131: break;
132:
133: case IPL_SOFTNET:
134: si = SI_SOFTNET;
135: break;
136:
137: case IPL_TTY:
138: case IPL_SOFTSERIAL:
139: si = SI_SOFTSERIAL;
140: break;
141:
142: default:
143: panic("softintr_establish: unknown soft IPL %d", ipl);
144: }
145:
146: sih = malloc(sizeof(*sih), M_DEVBUF, M_NOWAIT);
147: if (__predict_true(sih != NULL)) {
148: sih->sih_func = func;
149: sih->sih_arg = arg;
150: sih->sih_siq = &soft_intrq[si];
151: sih->sih_pending = 0;
152: }
153: return (sih);
154: }
155:
156: /*
157: * softintr_disestablish: [interface]
158: *
159: * Unregister a software interrupt handler.
160: */
161: void
162: softintr_disestablish(void *arg)
163: {
164: struct soft_intrhand *sih = arg;
165: struct soft_intrq *siq = sih->sih_siq;
166: int oldirqstate;
167:
168: oldirqstate = disable_interrupts(I32_bit);
169: if (sih->sih_pending) {
170: TAILQ_REMOVE(&siq->siq_list, sih, sih_list);
171: sih->sih_pending = 0;
172: }
173: restore_interrupts(oldirqstate);
174:
175: free(sih, M_DEVBUF);
176: }
177:
178: int netisr;
179:
180: void
181: netintr(void)
182: {
183: int n;
184:
185: while ((n = netisr) != 0) {
186: atomic_clearbits_int(&netisr, n);
187:
188: #define DONETISR(bit, fn) \
189: do { \
190: if (n & (1 << (bit))) \
191: fn(); \
192: } while (/*CONSTCOND*/0)
193:
194: #include <net/netisr_dispatch.h>
195:
196: #undef DONETISR
197: }
198: }
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